1// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.1a -show-encoding < %s 2> %t | FileCheck %s 2// RUN: FileCheck --check-prefix=CHECK-ERROR < %t %s 3 .text 4 5 //AdvSIMD RDMA vector 6 sqrdmlah v0.4h, v1.4h, v2.4h 7 sqrdmlsh v0.4h, v1.4h, v2.4h 8 sqrdmlah v0.2s, v1.2s, v2.2s 9 sqrdmlsh v0.2s, v1.2s, v2.2s 10 sqrdmlah v0.4s, v1.4s, v2.4s 11 sqrdmlsh v0.4s, v1.4s, v2.4s 12 sqrdmlah v0.8h, v1.8h, v2.8h 13 sqrdmlsh v0.8h, v1.8h, v2.8h 14// CHECK: sqrdmlah v0.4h, v1.4h, v2.4h // encoding: [0x20,0x84,0x42,0x2e] 15// CHECK: sqrdmlsh v0.4h, v1.4h, v2.4h // encoding: [0x20,0x8c,0x42,0x2e] 16// CHECK: sqrdmlah v0.2s, v1.2s, v2.2s // encoding: [0x20,0x84,0x82,0x2e] 17// CHECK: sqrdmlsh v0.2s, v1.2s, v2.2s // encoding: [0x20,0x8c,0x82,0x2e] 18// CHECK: sqrdmlah v0.4s, v1.4s, v2.4s // encoding: [0x20,0x84,0x82,0x6e] 19// CHECK: sqrdmlsh v0.4s, v1.4s, v2.4s // encoding: [0x20,0x8c,0x82,0x6e] 20// CHECK: sqrdmlah v0.8h, v1.8h, v2.8h // encoding: [0x20,0x84,0x42,0x6e] 21// CHECK: sqrdmlsh v0.8h, v1.8h, v2.8h // encoding: [0x20,0x8c,0x42,0x6e] 22 23 sqrdmlah v0.2h, v1.2h, v2.2h 24 sqrdmlsh v0.2h, v1.2h, v2.2h 25 sqrdmlah v0.8s, v1.8s, v2.8s 26 sqrdmlsh v0.8s, v1.8s, v2.8s 27 sqrdmlah v0.2s, v1.4h, v2.8h 28 sqrdmlsh v0.4s, v1.8h, v2.2s 29// CHECK-ERROR: error: invalid operand for instruction 30// CHECK-ERROR: sqrdmlah v0.2h, v1.2h, v2.2h 31// CHECK-ERROR: ^ 32// CHECK-ERROR: error: invalid operand for instruction 33// CHECK-ERROR: sqrdmlsh v0.2h, v1.2h, v2.2h 34// CHECK-ERROR: ^ 35// CHECK-ERROR: error: invalid vector kind qualifier 36// CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s 37// CHECK-ERROR: ^ 38// CHECK-ERROR: error: invalid vector kind qualifier 39// CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s 40// CHECK-ERROR: ^ 41// CHECK-ERROR: error: invalid vector kind qualifier 42// CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s 43// CHECK-ERROR: ^ 44// CHECK-ERROR: error: invalid operand for instruction 45// CHECK-ERROR: sqrdmlah v0.8s, v1.8s, v2.8s 46// CHECK-ERROR: ^ 47// CHECK-ERROR: error: invalid vector kind qualifier 48// CHECK-ERROR: sqrdmlsh v0.8s, v1.8s, v2.8s 49// CHECK-ERROR: ^ 50// CHECK-ERROR: error: invalid vector kind qualifier 51// CHECK-ERROR: sqrdmlsh v0.8s, v1.8s, v2.8s 52// CHECK-ERROR: ^ 53// CHECK-ERROR: error: invalid vector kind qualifier 54// CHECK-ERROR: sqrdmlsh v0.8s, v1.8s, v2.8s 55// CHECK-ERROR: ^ 56// CHECK-ERROR: error: invalid operand for instruction 57// CHECK-ERROR: sqrdmlsh v0.8s, v1.8s, v2.8s 58// CHECK-ERROR: ^ 59// CHECK-ERROR: error: invalid operand for instruction 60// CHECK-ERROR: sqrdmlah v0.2s, v1.4h, v2.8h 61// CHECK-ERROR: ^ 62// CHECK-ERROR: error: invalid operand for instruction 63// CHECK-ERROR: sqrdmlsh v0.4s, v1.8h, v2.2s 64// CHECK-ERROR: ^ 65 66 //AdvSIMD RDMA scalar 67 sqrdmlah h0, h1, h2 68 sqrdmlsh h0, h1, h2 69 sqrdmlah s0, s1, s2 70 sqrdmlsh s0, s1, s2 71// CHECK: sqrdmlah h0, h1, h2 // encoding: [0x20,0x84,0x42,0x7e] 72// CHECK: sqrdmlsh h0, h1, h2 // encoding: [0x20,0x8c,0x42,0x7e] 73// CHECK: sqrdmlah s0, s1, s2 // encoding: [0x20,0x84,0x82,0x7e] 74// CHECK: sqrdmlsh s0, s1, s2 // encoding: [0x20,0x8c,0x82,0x7e] 75 76 //AdvSIMD RDMA vector by-element 77 sqrdmlah v0.4h, v1.4h, v2.h[3] 78 sqrdmlsh v0.4h, v1.4h, v2.h[3] 79 sqrdmlah v0.2s, v1.2s, v2.s[1] 80 sqrdmlsh v0.2s, v1.2s, v2.s[1] 81 sqrdmlah v0.8h, v1.8h, v2.h[3] 82 sqrdmlsh v0.8h, v1.8h, v2.h[3] 83 sqrdmlah v0.4s, v1.4s, v2.s[3] 84 sqrdmlsh v0.4s, v1.4s, v2.s[3] 85// CHECK: sqrdmlah v0.4h, v1.4h, v2.h[3] // encoding: [0x20,0xd0,0x72,0x2f] 86// CHECK: sqrdmlsh v0.4h, v1.4h, v2.h[3] // encoding: [0x20,0xf0,0x72,0x2f] 87// CHECK: sqrdmlah v0.2s, v1.2s, v2.s[1] // encoding: [0x20,0xd0,0xa2,0x2f] 88// CHECK: sqrdmlsh v0.2s, v1.2s, v2.s[1] // encoding: [0x20,0xf0,0xa2,0x2f] 89// CHECK: sqrdmlah v0.8h, v1.8h, v2.h[3] // encoding: [0x20,0xd0,0x72,0x6f] 90// CHECK: sqrdmlsh v0.8h, v1.8h, v2.h[3] // encoding: [0x20,0xf0,0x72,0x6f] 91// CHECK: sqrdmlah v0.4s, v1.4s, v2.s[3] // encoding: [0x20,0xd8,0xa2,0x6f] 92// CHECK: sqrdmlsh v0.4s, v1.4s, v2.s[3] // encoding: [0x20,0xf8,0xa2,0x6f] 93 94 sqrdmlah v0.4s, v1.2s, v2.s[1] 95 sqrdmlsh v0.2s, v1.2d, v2.s[1] 96 sqrdmlah v0.8h, v1.8h, v2.s[3] 97 sqrdmlsh v0.8h, v1.8h, v2.h[8] 98// CHECK-ERROR: error: invalid operand for instruction 99// CHECK-ERROR: sqrdmlah v0.4s, v1.2s, v2.s[1] 100// CHECK-ERROR: ^ 101// CHECK-ERROR: error: invalid operand for instruction 102// CHECK-ERROR: sqrdmlsh v0.2s, v1.2d, v2.s[1] 103// CHECK-ERROR: ^ 104// CHECK-ERROR: error: invalid operand for instruction 105// CHECK-ERROR: sqrdmlah v0.8h, v1.8h, v2.s[3] 106// CHECK-ERROR: ^ 107// CHECK-ERROR: error: vector lane must be an integer in range [0, 7]. 108// CHECK-ERROR: sqrdmlsh v0.8h, v1.8h, v2.h[8] 109// CHECK-ERROR: ^ 110 111 //AdvSIMD RDMA scalar by-element 112 sqrdmlah h0, h1, v2.h[3] 113 sqrdmlsh h0, h1, v2.h[3] 114 sqrdmlah s0, s1, v2.s[3] 115 sqrdmlsh s0, s1, v2.s[3] 116// CHECK: sqrdmlah h0, h1, v2.h[3] // encoding: [0x20,0xd0,0x72,0x7f] 117// CHECK: sqrdmlsh h0, h1, v2.h[3] // encoding: [0x20,0xf0,0x72,0x7f] 118// CHECK: sqrdmlah s0, s1, v2.s[3] // encoding: [0x20,0xd8,0xa2,0x7f] 119// CHECK: sqrdmlsh s0, s1, v2.s[3] // encoding: [0x20,0xf8,0xa2,0x7f] 120 121 sqrdmlah b0, h1, v2.h[3] 122 sqrdmlah s0, d1, v2.s[3] 123 sqrdmlsh h0, h1, v2.s[3] 124 sqrdmlsh s0, s1, v2.s[4] 125// CHECK-ERROR: error: invalid operand for instruction 126// CHECK-ERROR: sqrdmlah b0, h1, v2.h[3] 127// CHECK-ERROR: ^ 128// CHECK-ERROR: error: invalid operand for instruction 129// CHECK-ERROR: sqrdmlah s0, d1, v2.s[3] 130// CHECK-ERROR: ^ 131// CHECK-ERROR: error: invalid operand for instruction 132// CHECK-ERROR: sqrdmlsh h0, h1, v2.s[3] 133// CHECK-ERROR: ^ 134// CHECK-ERROR: error: vector lane must be an integer in range [0, 3]. 135// CHECK-ERROR: sqrdmlsh s0, s1, v2.s[4] 136// CHECK-ERROR: ^ 137