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1;; AArch64 is arbitralily chosen as a 32/64-bit RISC representative to show the transform in all tests.
2
3; RUN: opt < %s -codegenprepare -S -mtriple=aarch64-unknown-unknown | FileCheck %s --check-prefix=ARM64
4
5; AArch64 widens to 32-bit.
6
7define i32 @widen_switch_i16(i32 %a)  {
8entry:
9  %trunc = trunc i32 %a to i16
10  switch i16 %trunc, label %sw.default [
11    i16 1, label %sw.bb0
12    i16 -1, label %sw.bb1
13  ]
14
15sw.bb0:
16  br label %return
17
18sw.bb1:
19  br label %return
20
21sw.default:
22  br label %return
23
24return:
25  %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
26  ret i32 %retval
27
28; ARM64-LABEL: @widen_switch_i16(
29; ARM64:       %0 = zext i16 %trunc to i32
30; ARM64-NEXT:  switch i32 %0, label %sw.default [
31; ARM64-NEXT:    i32 1, label %return
32; ARM64-NEXT:    i32 65535, label %sw.bb1
33}
34
35; Widen to 32-bit from a smaller, non-native type.
36
37define i32 @widen_switch_i17(i32 %a)  {
38entry:
39  %trunc = trunc i32 %a to i17
40  switch i17 %trunc, label %sw.default [
41    i17 10, label %sw.bb0
42    i17 -1, label %sw.bb1
43  ]
44
45sw.bb0:
46  br label %return
47
48sw.bb1:
49  br label %return
50
51sw.default:
52  br label %return
53
54return:
55  %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
56  ret i32 %retval
57
58; ARM64-LABEL: @widen_switch_i17(
59; ARM64:       %0 = zext i17 %trunc to i32
60; ARM64-NEXT:  switch i32 %0, label %sw.default [
61; ARM64-NEXT:    i32 10, label %return
62; ARM64-NEXT:    i32 131071, label %sw.bb1
63}
64
65; If the switch condition is a sign-extended function argument, then the
66; condition and cases should be sign-extended rather than zero-extended
67; because the sign-extension can be optimized away.
68
69define i32 @widen_switch_i16_sext(i2 signext %a)  {
70entry:
71  switch i2 %a, label %sw.default [
72    i2 1, label %sw.bb0
73    i2 -1, label %sw.bb1
74  ]
75
76sw.bb0:
77  br label %return
78
79sw.bb1:
80  br label %return
81
82sw.default:
83  br label %return
84
85return:
86  %retval = phi i32 [ -1, %sw.default ], [ 0, %sw.bb0 ], [ 1, %sw.bb1 ]
87  ret i32 %retval
88
89; ARM64-LABEL: @widen_switch_i16_sext(
90; ARM64:       %0 = sext i2 %a to i32
91; ARM64-NEXT:  switch i32 %0, label %sw.default [
92; ARM64-NEXT:    i32 1, label %return
93; ARM64-NEXT:    i32 -1, label %sw.bb1
94}
95
96