1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; This test makes sure that div instructions are properly eliminated. 3 4; RUN: opt < %s -instcombine -S | FileCheck %s 5 6define i32 @test1(i32 %A) { 7; CHECK-LABEL: @test1( 8; CHECK-NEXT: ret i32 %A 9; 10 %B = sdiv i32 %A, 1 ; <i32> [#uses=1] 11 ret i32 %B 12} 13 14define i32 @test2(i32 %A) { 15 ; => Shift 16; CHECK-LABEL: @test2( 17; CHECK-NEXT: [[B:%.*]] = lshr i32 %A, 3 18; CHECK-NEXT: ret i32 [[B]] 19; 20 %B = udiv i32 %A, 8 ; <i32> [#uses=1] 21 ret i32 %B 22} 23 24define i32 @test3(i32 %A) { 25 ; => 0, don't need to keep traps 26; CHECK-LABEL: @test3( 27; CHECK-NEXT: ret i32 0 28; 29 %B = sdiv i32 0, %A ; <i32> [#uses=1] 30 ret i32 %B 31} 32 33define i32 @test4(i32 %A) { 34 ; 0-A 35; CHECK-LABEL: @test4( 36; CHECK-NEXT: [[B:%.*]] = sub i32 0, %A 37; CHECK-NEXT: ret i32 [[B]] 38; 39 %B = sdiv i32 %A, -1 ; <i32> [#uses=1] 40 ret i32 %B 41} 42 43define i32 @test5(i32 %A) { 44; CHECK-LABEL: @test5( 45; CHECK-NEXT: ret i32 0 46; 47 %B = udiv i32 %A, -16 ; <i32> [#uses=1] 48 %C = udiv i32 %B, -4 ; <i32> [#uses=1] 49 ret i32 %C 50} 51 52define i1 @test6(i32 %A) { 53; CHECK-LABEL: @test6( 54; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 %A, 123 55; CHECK-NEXT: ret i1 [[TMP1]] 56; 57 %B = udiv i32 %A, 123 ; <i32> [#uses=1] 58 ; A < 123 59 %C = icmp eq i32 %B, 0 ; <i1> [#uses=1] 60 ret i1 %C 61} 62 63define i1 @test7(i32 %A) { 64; CHECK-LABEL: @test7( 65; CHECK-NEXT: [[A_OFF:%.*]] = add i32 %A, -20 66; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[A_OFF]], 10 67; CHECK-NEXT: ret i1 [[TMP1]] 68; 69 %B = udiv i32 %A, 10 ; <i32> [#uses=1] 70 ; A >= 20 && A < 30 71 %C = icmp eq i32 %B, 2 ; <i1> [#uses=1] 72 ret i1 %C 73} 74 75define i1 @test8(i8 %A) { 76; CHECK-LABEL: @test8( 77; CHECK-NEXT: [[C:%.*]] = icmp ugt i8 %A, -11 78; CHECK-NEXT: ret i1 [[C]] 79; 80 %B = udiv i8 %A, 123 ; <i8> [#uses=1] 81 ; A >= 246 82 %C = icmp eq i8 %B, 2 ; <i1> [#uses=1] 83 ret i1 %C 84} 85 86define i1 @test9(i8 %A) { 87; CHECK-LABEL: @test9( 88; CHECK-NEXT: [[C:%.*]] = icmp ult i8 %A, -10 89; CHECK-NEXT: ret i1 [[C]] 90; 91 %B = udiv i8 %A, 123 ; <i8> [#uses=1] 92 ; A < 246 93 %C = icmp ne i8 %B, 2 ; <i1> [#uses=1] 94 ret i1 %C 95} 96 97define i32 @test10(i32 %X, i1 %C) { 98; CHECK-LABEL: @test10( 99; CHECK-NEXT: [[R_V:%.*]] = select i1 %C, i32 6, i32 3 100; CHECK-NEXT: [[R:%.*]] = lshr i32 %X, [[R:%.*]].v 101; CHECK-NEXT: ret i32 [[R]] 102; 103 %V = select i1 %C, i32 64, i32 8 ; <i32> [#uses=1] 104 %R = udiv i32 %X, %V ; <i32> [#uses=1] 105 ret i32 %R 106} 107 108define i32 @test11(i32 %X, i1 %C) { 109; CHECK-LABEL: @test11( 110; CHECK-NEXT: [[B_V:%.*]] = select i1 %C, i32 10, i32 5 111; CHECK-NEXT: [[B:%.*]] = lshr i32 %X, [[B:%.*]].v 112; CHECK-NEXT: ret i32 [[B]] 113; 114 %A = select i1 %C, i32 1024, i32 32 ; <i32> [#uses=1] 115 %B = udiv i32 %X, %A ; <i32> [#uses=1] 116 ret i32 %B 117} 118 119; PR2328 120define i32 @test12(i32 %x) nounwind { 121; CHECK-LABEL: @test12( 122; CHECK-NEXT: ret i32 1 123; 124 %tmp3 = udiv i32 %x, %x ; 1 125 ret i32 %tmp3 126} 127 128define i32 @test13(i32 %x) nounwind { 129; CHECK-LABEL: @test13( 130; CHECK-NEXT: ret i32 1 131; 132 %tmp3 = sdiv i32 %x, %x ; 1 133 ret i32 %tmp3 134} 135 136define i32 @test14(i8 %x) nounwind { 137; CHECK-LABEL: @test14( 138; CHECK-NEXT: ret i32 0 139; 140 %zext = zext i8 %x to i32 141 %div = udiv i32 %zext, 257 ; 0 142 ret i32 %div 143} 144 145; PR9814 146define i32 @test15(i32 %a, i32 %b) nounwind { 147; CHECK-LABEL: @test15( 148; CHECK-NEXT: [[TMP1:%.*]] = add i32 %b, -2 149; CHECK-NEXT: [[DIV2:%.*]] = lshr i32 %a, [[TMP1]] 150; CHECK-NEXT: ret i32 [[DIV2]] 151; 152 %shl = shl i32 1, %b 153 %div = lshr i32 %shl, 2 154 %div2 = udiv i32 %a, %div 155 ret i32 %div2 156} 157 158define <2 x i64> @test16(<2 x i64> %x) nounwind { 159; CHECK-LABEL: @test16( 160; CHECK-NEXT: [[DIV:%.*]] = udiv <2 x i64> %x, <i64 192, i64 192> 161; CHECK-NEXT: ret <2 x i64> [[DIV]] 162; 163 %shr = lshr <2 x i64> %x, <i64 5, i64 5> 164 %div = udiv <2 x i64> %shr, <i64 6, i64 6> 165 ret <2 x i64> %div 166} 167 168define <2 x i64> @test17(<2 x i64> %x) nounwind { 169; CHECK-LABEL: @test17( 170; CHECK-NEXT: [[DIV:%.*]] = sdiv <2 x i64> %x, <i64 -3, i64 -4> 171; CHECK-NEXT: ret <2 x i64> [[DIV]] 172; 173 %neg = sub nsw <2 x i64> zeroinitializer, %x 174 %div = sdiv <2 x i64> %neg, <i64 3, i64 4> 175 ret <2 x i64> %div 176} 177 178define <2 x i64> @test18(<2 x i64> %x) nounwind { 179; CHECK-LABEL: @test18( 180; CHECK-NEXT: [[DIV:%.*]] = sub <2 x i64> zeroinitializer, %x 181; CHECK-NEXT: ret <2 x i64> [[DIV]] 182; 183 %div = sdiv <2 x i64> %x, <i64 -1, i64 -1> 184 ret <2 x i64> %div 185} 186 187define i32 @test19(i32 %x) { 188; CHECK-LABEL: @test19( 189; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 %x, 1 190; CHECK-NEXT: [[A:%.*]] = zext i1 [[TMP1]] to i32 191; CHECK-NEXT: ret i32 [[A]] 192; 193 %A = udiv i32 1, %x 194 ret i32 %A 195} 196 197define i32 @test20(i32 %x) { 198; CHECK-LABEL: @test20( 199; CHECK-NEXT: [[TMP1:%.*]] = add i32 %x, 1 200; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 3 201; CHECK-NEXT: [[A:%.*]] = select i1 [[TMP2]], i32 %x, i32 0 202; CHECK-NEXT: ret i32 [[A]] 203; 204 %A = sdiv i32 1, %x 205 ret i32 %A 206} 207 208define i32 @test21(i32 %a) { 209; CHECK-LABEL: @test21( 210; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 %a, 3 211; CHECK-NEXT: ret i32 [[DIV]] 212; 213 %shl = shl nsw i32 %a, 2 214 %div = sdiv i32 %shl, 12 215 ret i32 %div 216} 217 218define i32 @test22(i32 %a) { 219; CHECK-LABEL: @test22( 220; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 %a, 4 221; CHECK-NEXT: ret i32 [[DIV]] 222; 223 %mul = mul nsw i32 %a, 3 224 %div = sdiv i32 %mul, 12 225 ret i32 %div 226} 227 228define i32 @test23(i32 %a) { 229; CHECK-LABEL: @test23( 230; CHECK-NEXT: [[DIV:%.*]] = udiv i32 %a, 3 231; CHECK-NEXT: ret i32 [[DIV]] 232; 233 %shl = shl nuw i32 %a, 2 234 %div = udiv i32 %shl, 12 235 ret i32 %div 236} 237 238define i32 @test24(i32 %a) { 239; CHECK-LABEL: @test24( 240; CHECK-NEXT: [[DIV:%.*]] = lshr i32 %a, 2 241; CHECK-NEXT: ret i32 [[DIV]] 242; 243 %mul = mul nuw i32 %a, 3 244 %div = udiv i32 %mul, 12 245 ret i32 %div 246} 247 248define i32 @test25(i32 %a) { 249; CHECK-LABEL: @test25( 250; CHECK-NEXT: [[DIV:%.*]] = shl nsw i32 %a, 1 251; CHECK-NEXT: ret i32 [[DIV]] 252; 253 %shl = shl nsw i32 %a, 2 254 %div = sdiv i32 %shl, 2 255 ret i32 %div 256} 257 258define i32 @test26(i32 %a) { 259; CHECK-LABEL: @test26( 260; CHECK-NEXT: [[DIV:%.*]] = shl nsw i32 %a, 2 261; CHECK-NEXT: ret i32 [[DIV]] 262; 263 %mul = mul nsw i32 %a, 12 264 %div = sdiv i32 %mul, 3 265 ret i32 %div 266} 267 268define i32 @test27(i32 %a) { 269; CHECK-LABEL: @test27( 270; CHECK-NEXT: [[DIV:%.*]] = shl nuw i32 %a, 1 271; CHECK-NEXT: ret i32 [[DIV]] 272; 273 %shl = shl nuw i32 %a, 2 274 %div = udiv i32 %shl, 2 275 ret i32 %div 276} 277 278define i32 @test28(i32 %a) { 279; CHECK-LABEL: @test28( 280; CHECK-NEXT: [[DIV:%.*]] = mul nuw i32 %a, 12 281; CHECK-NEXT: ret i32 [[DIV]] 282; 283 %mul = mul nuw i32 %a, 36 284 %div = udiv i32 %mul, 3 285 ret i32 %div 286} 287 288define i32 @test29(i32 %a) { 289; CHECK-LABEL: @test29( 290; CHECK-NEXT: [[MUL_LOBIT:%.*]] = and i32 %a, 1 291; CHECK-NEXT: ret i32 [[MUL_LOBIT]] 292; 293 %mul = shl nsw i32 %a, 31 294 %div = sdiv i32 %mul, -2147483648 295 ret i32 %div 296} 297 298define i32 @test30(i32 %a) { 299; CHECK-LABEL: @test30( 300; CHECK-NEXT: ret i32 %a 301; 302 %mul = shl nuw i32 %a, 31 303 %div = udiv i32 %mul, -2147483648 304 ret i32 %div 305} 306 307define <2 x i32> @test31(<2 x i32> %x) { 308; CHECK-LABEL: @test31( 309; CHECK-NEXT: ret <2 x i32> zeroinitializer 310; 311 %shr = lshr <2 x i32> %x, <i32 31, i32 31> 312 %div = udiv <2 x i32> %shr, <i32 2147483647, i32 2147483647> 313 ret <2 x i32> %div 314} 315 316define i32 @test32(i32 %a, i32 %b) { 317; CHECK-LABEL: @test32( 318; CHECK-NEXT: [[SHL:%.*]] = shl i32 2, %b 319; CHECK-NEXT: [[DIV:%.*]] = lshr i32 [[SHL]], 2 320; CHECK-NEXT: [[DIV2:%.*]] = udiv i32 %a, [[DIV]] 321; CHECK-NEXT: ret i32 [[DIV2]] 322; 323 %shl = shl i32 2, %b 324 %div = lshr i32 %shl, 2 325 %div2 = udiv i32 %a, %div 326 ret i32 %div2 327} 328 329define <2 x i64> @test33(<2 x i64> %x) nounwind { 330; CHECK-LABEL: @test33( 331; CHECK-NEXT: [[DIV:%.*]] = udiv exact <2 x i64> %x, <i64 192, i64 192> 332; CHECK-NEXT: ret <2 x i64> [[DIV]] 333; 334 %shr = lshr exact <2 x i64> %x, <i64 5, i64 5> 335 %div = udiv exact <2 x i64> %shr, <i64 6, i64 6> 336 ret <2 x i64> %div 337} 338 339define <2 x i64> @test34(<2 x i64> %x) nounwind { 340; CHECK-LABEL: @test34( 341; CHECK-NEXT: [[DIV:%.*]] = sdiv exact <2 x i64> %x, <i64 -3, i64 -4> 342; CHECK-NEXT: ret <2 x i64> [[DIV]] 343; 344 %neg = sub nsw <2 x i64> zeroinitializer, %x 345 %div = sdiv exact <2 x i64> %neg, <i64 3, i64 4> 346 ret <2 x i64> %div 347} 348 349define i32 @test35(i32 %A) { 350; CHECK-LABEL: @test35( 351; CHECK-NEXT: [[AND:%.*]] = and i32 %A, 2147483647 352; CHECK-NEXT: [[MUL:%.*]] = udiv exact i32 [[AND]], 2147483647 353; CHECK-NEXT: ret i32 [[MUL]] 354; 355 %and = and i32 %A, 2147483647 356 %mul = sdiv exact i32 %and, 2147483647 357 ret i32 %mul 358} 359 360define i32 @test36(i32 %A) { 361; CHECK-LABEL: @test36( 362; CHECK-NEXT: [[AND:%.*]] = and i32 %A, 2147483647 363; CHECK-NEXT: [[MUL:%.*]] = lshr exact i32 [[AND]], %A 364; CHECK-NEXT: ret i32 [[MUL]] 365; 366 %and = and i32 %A, 2147483647 367 %shl = shl nsw i32 1, %A 368 %mul = sdiv exact i32 %and, %shl 369 ret i32 %mul 370} 371 372; FIXME: Vector should get same transform as scalar. 373 374define <2 x i32> @test36vec(<2 x i32> %A) { 375; CHECK-LABEL: @test36vec( 376; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> %A, <i32 2147483647, i32 2147483647> 377; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw <2 x i32> <i32 1, i32 1>, %A 378; CHECK-NEXT: [[MUL:%.*]] = sdiv exact <2 x i32> [[AND]], [[SHL]] 379; CHECK-NEXT: ret <2 x i32> [[MUL]] 380; 381 %and = and <2 x i32> %A, <i32 2147483647, i32 2147483647> 382 %shl = shl nsw <2 x i32> <i32 1, i32 1>, %A 383 %mul = sdiv exact <2 x i32> %and, %shl 384 ret <2 x i32> %mul 385} 386 387define i32 @test37(i32* %b) { 388; CHECK-LABEL: @test37( 389; CHECK-NEXT: entry: 390; CHECK-NEXT: store i32 0, i32* %b, align 4 391; CHECK-NEXT: br i1 undef, label %lor.rhs, label %lor.end 392; CHECK: lor.rhs: 393; CHECK-NEXT: br label %lor.end 394; CHECK: lor.end: 395; CHECK-NEXT: ret i32 0 396; 397entry: 398 store i32 0, i32* %b, align 4 399 %0 = load i32, i32* %b, align 4 400 br i1 undef, label %lor.rhs, label %lor.end 401 402lor.rhs: ; preds = %entry 403 %mul = mul nsw i32 undef, %0 404 br label %lor.end 405 406lor.end: ; preds = %lor.rhs, %entry 407 %t.0 = phi i32 [ %0, %entry ], [ %mul, %lor.rhs ] 408 %div = sdiv i32 %t.0, 2 409 ret i32 %div 410} 411 412; We can perform the division in the smaller type. 413 414define i32 @shrink(i8 %x) { 415; CHECK-LABEL: @shrink( 416; CHECK-NEXT: [[TMP1:%.*]] = sdiv i8 %x, 127 417; CHECK-NEXT: [[DIV:%.*]] = sext i8 [[TMP1]] to i32 418; CHECK-NEXT: ret i32 [[DIV]] 419; 420 %conv = sext i8 %x to i32 421 %div = sdiv i32 %conv, 127 422 ret i32 %div 423} 424 425; Division in the smaller type can lead to more optimizations. 426 427define i32 @zap(i8 %x) { 428; CHECK-LABEL: @zap( 429; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 %x, -128 430; CHECK-NEXT: [[DIV:%.*]] = zext i1 [[TMP1]] to i32 431; CHECK-NEXT: ret i32 [[DIV]] 432; 433 %conv = sext i8 %x to i32 434 %div = sdiv i32 %conv, -128 435 ret i32 %div 436} 437 438; Splat constant divisors should get the same folds. 439 440define <3 x i32> @shrink_vec(<3 x i8> %x) { 441; CHECK-LABEL: @shrink_vec( 442; CHECK-NEXT: [[TMP1:%.*]] = sdiv <3 x i8> %x, <i8 127, i8 127, i8 127> 443; CHECK-NEXT: [[DIV:%.*]] = sext <3 x i8> [[TMP1]] to <3 x i32> 444; CHECK-NEXT: ret <3 x i32> [[DIV]] 445; 446 %conv = sext <3 x i8> %x to <3 x i32> 447 %div = sdiv <3 x i32> %conv, <i32 127, i32 127, i32 127> 448 ret <3 x i32> %div 449} 450 451define <2 x i32> @zap_vec(<2 x i8> %x) { 452; CHECK-LABEL: @zap_vec( 453; CHECK-NEXT: [[TMP1:%.*]] = icmp eq <2 x i8> %x, <i8 -128, i8 -128> 454; CHECK-NEXT: [[DIV:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i32> 455; CHECK-NEXT: ret <2 x i32> [[DIV]] 456; 457 %conv = sext <2 x i8> %x to <2 x i32> 458 %div = sdiv <2 x i32> %conv, <i32 -128, i32 -128> 459 ret <2 x i32> %div 460} 461 462; But we can't do this if the signed constant won't fit in the original type. 463 464define i32 @shrink_no(i8 %x) { 465; CHECK-LABEL: @shrink_no( 466; CHECK-NEXT: [[CONV:%.*]] = sext i8 %x to i32 467; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[CONV]], 128 468; CHECK-NEXT: ret i32 [[DIV]] 469; 470 %conv = sext i8 %x to i32 471 %div = sdiv i32 %conv, 128 472 ret i32 %div 473} 474 475define i32 @shrink_no2(i8 %x) { 476; CHECK-LABEL: @shrink_no2( 477; CHECK-NEXT: [[CONV:%.*]] = sext i8 %x to i32 478; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[CONV]], -129 479; CHECK-NEXT: ret i32 [[DIV]] 480; 481 %conv = sext i8 %x to i32 482 %div = sdiv i32 %conv, -129 483 ret i32 %div 484} 485 486; 17 bits are needed to represent 65535 as a signed value, so this shouldn't fold. 487 488define i32 @shrink_no3(i16 %x) { 489; CHECK-LABEL: @shrink_no3( 490; CHECK-NEXT: [[CONV:%.*]] = sext i16 %x to i32 491; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[CONV]], 65535 492; CHECK-NEXT: ret i32 [[DIV]] 493; 494 %conv = sext i16 %x to i32 495 %div = sdiv i32 %conv, 65535 496 ret i32 %div 497} 498 499