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1 /*
2  * Copyright © 2017 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  */
23 
24 #include "compiler/nir/nir_builder.h"
25 
26 static inline nir_ssa_def *
blorp_nir_frag_coord(nir_builder * b)27 blorp_nir_frag_coord(nir_builder *b)
28 {
29    nir_variable *frag_coord =
30       nir_variable_create(b->shader, nir_var_shader_in,
31                           glsl_vec4_type(), "gl_FragCoord");
32 
33    frag_coord->data.location = VARYING_SLOT_POS;
34    frag_coord->data.origin_upper_left = true;
35 
36    return nir_load_var(b, frag_coord);
37 }
38 
39 static inline nir_ssa_def *
blorp_nir_txf_ms_mcs(nir_builder * b,nir_ssa_def * xy_pos,nir_ssa_def * layer)40 blorp_nir_txf_ms_mcs(nir_builder *b, nir_ssa_def *xy_pos, nir_ssa_def *layer)
41 {
42    nir_tex_instr *tex = nir_tex_instr_create(b->shader, 1);
43    tex->op = nir_texop_txf_ms_mcs;
44    tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
45    tex->dest_type = nir_type_int;
46 
47    nir_ssa_def *coord;
48    if (layer) {
49       tex->is_array = true;
50       tex->coord_components = 3;
51       coord = nir_vec3(b, nir_channel(b, xy_pos, 0),
52                           nir_channel(b, xy_pos, 1),
53                           layer);
54    } else {
55       tex->is_array = false;
56       tex->coord_components = 2;
57       coord = nir_channels(b, xy_pos, 0x3);
58    }
59    tex->src[0].src_type = nir_tex_src_coord;
60    tex->src[0].src = nir_src_for_ssa(coord);
61 
62    /* Blorp only has one texture and it's bound at unit 0 */
63    tex->texture_index = 0;
64    tex->sampler_index = 0;
65 
66    nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, NULL);
67    nir_builder_instr_insert(b, &tex->instr);
68 
69    return &tex->dest.ssa;
70 }
71 
72 static inline nir_ssa_def *
blorp_nir_mcs_is_clear_color(nir_builder * b,nir_ssa_def * mcs,uint32_t samples)73 blorp_nir_mcs_is_clear_color(nir_builder *b,
74                              nir_ssa_def *mcs,
75                              uint32_t samples)
76 {
77    switch (samples) {
78    case 2:
79       /* Empirical evidence suggests that the value returned from the
80        * sampler is not always 0x3 for clear color so we need to mask it.
81        */
82       return nir_ieq(b, nir_iand(b, nir_channel(b, mcs, 0),
83                                     nir_imm_int(b, 0x3)),
84                     nir_imm_int(b, 0x3));
85 
86    case 4:
87       return nir_ieq(b, nir_channel(b, mcs, 0), nir_imm_int(b, 0xff));
88 
89    case 8:
90       return nir_ieq(b, nir_channel(b, mcs, 0), nir_imm_int(b, ~0));
91 
92    case 16:
93       /* For 16x MSAA, the MCS is actually an ivec2 */
94       return nir_iand(b, nir_ieq(b, nir_channel(b, mcs, 0),
95                                     nir_imm_int(b, ~0)),
96                          nir_ieq(b, nir_channel(b, mcs, 1),
97                                     nir_imm_int(b, ~0)));
98 
99    default:
100       unreachable("Invalid sample count");
101    }
102 }
103