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1 //===-- ARMELFWriterInfo.cpp - ELF Writer Info for the ARM backend --------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements ELF writer information for the ARM backend.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "ARMELFWriterInfo.h"
15 #include "ARMRelocations.h"
16 #include "llvm/Function.h"
17 #include "llvm/Support/ErrorHandling.h"
18 #include "llvm/Target/TargetData.h"
19 #include "llvm/Target/TargetMachine.h"
20 #include "llvm/Support/ELF.h"
21 
22 using namespace llvm;
23 
24 //===----------------------------------------------------------------------===//
25 //  Implementation of the ARMELFWriterInfo class
26 //===----------------------------------------------------------------------===//
27 
ARMELFWriterInfo(TargetMachine & TM)28 ARMELFWriterInfo::ARMELFWriterInfo(TargetMachine &TM)
29   : TargetELFWriterInfo(TM.getTargetData()->getPointerSizeInBits() == 64,
30                         TM.getTargetData()->isLittleEndian()) {
31 }
32 
~ARMELFWriterInfo()33 ARMELFWriterInfo::~ARMELFWriterInfo() {}
34 
getRelocationType(unsigned MachineRelTy) const35 unsigned ARMELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
36   switch (MachineRelTy) {
37   case ARM::reloc_arm_absolute:
38   case ARM::reloc_arm_relative:
39   case ARM::reloc_arm_cp_entry:
40   case ARM::reloc_arm_vfp_cp_entry:
41   case ARM::reloc_arm_machine_cp_entry:
42   case ARM::reloc_arm_jt_base:
43   case ARM::reloc_arm_pic_jt:
44     assert(0 && "unsupported ARM relocation type"); break;
45 
46   case ARM::reloc_arm_branch: return ELF::R_ARM_CALL; break;
47   case ARM::reloc_arm_movt:   return ELF::R_ARM_MOVT_ABS; break;
48   case ARM::reloc_arm_movw:   return ELF::R_ARM_MOVW_ABS_NC; break;
49   default:
50     llvm_unreachable("unknown ARM relocation type"); break;
51   }
52   return 0;
53 }
54 
getDefaultAddendForRelTy(unsigned RelTy,long int Modifier) const55 long int ARMELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
56                                                     long int Modifier) const {
57   assert(0 && "ARMELFWriterInfo::getDefaultAddendForRelTy() not implemented");
58   return 0;
59 }
60 
getRelocationTySize(unsigned RelTy) const61 unsigned ARMELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
62   assert(0 && "ARMELFWriterInfo::getRelocationTySize() not implemented");
63   return 0;
64 }
65 
isPCRelativeRel(unsigned RelTy) const66 bool ARMELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
67   assert(0 && "ARMELFWriterInfo::isPCRelativeRel() not implemented");
68   return 1;
69 }
70 
getAbsoluteLabelMachineRelTy() const71 unsigned ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
72   assert(0 &&
73          "ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() not implemented");
74   return 0;
75 }
76 
computeRelocation(unsigned SymOffset,unsigned RelOffset,unsigned RelTy) const77 long int ARMELFWriterInfo::computeRelocation(unsigned SymOffset,
78                                              unsigned RelOffset,
79                                              unsigned RelTy) const {
80   assert(0 &&
81          "ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() not implemented");
82   return 0;
83 }
84