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1//===- PPCCallingConv.td - Calling Conventions for PowerPC -*- tablegen -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This describes the calling conventions for the PowerPC 32- and 64-bit
11// architectures.
12//
13//===----------------------------------------------------------------------===//
14
15/// CCIfSubtarget - Match if the current subtarget has a feature F.
16class CCIfSubtarget<string F, CCAction A>
17 : CCIf<!strconcat("State.getTarget().getSubtarget<PPCSubtarget>().", F), A>;
18
19//===----------------------------------------------------------------------===//
20// Return Value Calling Convention
21//===----------------------------------------------------------------------===//
22
23// Return-value convention for PowerPC
24def RetCC_PPC : CallingConv<[
25  CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>,
26  CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6]>>,
27
28  CCIfType<[f32], CCAssignToReg<[F1]>>,
29  CCIfType<[f64], CCAssignToReg<[F1, F2]>>,
30
31  // Vector types are always returned in V2.
32  CCIfType<[v16i8, v8i16, v4i32, v4f32], CCAssignToReg<[V2]>>
33]>;
34
35
36//===----------------------------------------------------------------------===//
37// PowerPC Argument Calling Conventions
38//===----------------------------------------------------------------------===//
39/*
40def CC_PPC : CallingConv<[
41  // The first 8 integer arguments are passed in integer registers.
42  CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>,
43  CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>,
44
45  // Common sub-targets passes FP values in F1 - F13
46  CCIfType<[f32, f64],
47           CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8,F9,F10,F11,F12,F13]>>,
48
49  // The first 12 Vector arguments are passed in altivec registers.
50  CCIfType<[v16i8, v8i16, v4i32, v4f32],
51              CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9, V10,V11,V12,V13]>>
52
53/*
54  // Integer/FP values get stored in stack slots that are 8 bytes in size and
55  // 8-byte aligned if there are no more registers to hold them.
56  CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
57
58  // Vectors get 16-byte stack slots that are 16-byte aligned.
59  CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
60              CCAssignToStack<16, 16>>*/
61]>;
62
63*/
64
65//===----------------------------------------------------------------------===//
66// PowerPC System V Release 4 ABI
67//===----------------------------------------------------------------------===//
68
69def CC_PPC_SVR4_Common : CallingConv<[
70  // The ABI requires i64 to be passed in two adjacent registers with the first
71  // register having an odd register number.
72  CCIfType<[i32], CCIfSplit<CCCustom<"CC_PPC_SVR4_Custom_AlignArgRegs">>>,
73
74  // The first 8 integer arguments are passed in integer registers.
75  CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>,
76
77  // Make sure the i64 words from a long double are either both passed in
78  // registers or both passed on the stack.
79  CCIfType<[f64], CCIfSplit<CCCustom<"CC_PPC_SVR4_Custom_AlignFPArgRegs">>>,
80
81  // FP values are passed in F1 - F8.
82  CCIfType<[f32, f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>,
83
84  // Split arguments have an alignment of 8 bytes on the stack.
85  CCIfType<[i32], CCIfSplit<CCAssignToStack<4, 8>>>,
86
87  CCIfType<[i32], CCAssignToStack<4, 4>>,
88
89  // Floats are stored in double precision format, thus they have the same
90  // alignment and size as doubles.
91  CCIfType<[f32,f64], CCAssignToStack<8, 8>>,
92
93  // Vectors get 16-byte stack slots that are 16-byte aligned.
94  CCIfType<[v16i8, v8i16, v4i32, v4f32], CCAssignToStack<16, 16>>
95]>;
96
97// This calling convention puts vector arguments always on the stack. It is used
98// to assign vector arguments which belong to the variable portion of the
99// parameter list of a variable argument function.
100def CC_PPC_SVR4_VarArg : CallingConv<[
101  CCDelegateTo<CC_PPC_SVR4_Common>
102]>;
103
104// In contrast to CC_PPC_SVR4_VarArg, this calling convention first tries to put
105// vector arguments in vector registers before putting them on the stack.
106def CC_PPC_SVR4 : CallingConv<[
107  // The first 12 Vector arguments are passed in AltiVec registers.
108  CCIfType<[v16i8, v8i16, v4i32, v4f32],
109           CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9, V10, V11, V12, V13]>>,
110
111  CCDelegateTo<CC_PPC_SVR4_Common>
112]>;
113
114// Helper "calling convention" to handle aggregate by value arguments.
115// Aggregate by value arguments are always placed in the local variable space
116// of the caller. This calling convention is only used to assign those stack
117// offsets in the callers stack frame.
118//
119// Still, the address of the aggregate copy in the callers stack frame is passed
120// in a GPR (or in the parameter list area if all GPRs are allocated) from the
121// caller to the callee. The location for the address argument is assigned by
122// the CC_PPC_SVR4 calling convention.
123//
124// The only purpose of CC_PPC_SVR4_Custom_Dummy is to skip arguments which are
125// not passed by value.
126
127def CC_PPC_SVR4_ByVal : CallingConv<[
128  CCIfByVal<CCPassByVal<4, 4>>,
129
130  CCCustom<"CC_PPC_SVR4_Custom_Dummy">
131]>;
132
133