1 //===-- X86TargetMachine.h - Define TargetMachine for the X86 ---*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the X86 specific subclass of TargetMachine. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef X86TARGETMACHINE_H 15 #define X86TARGETMACHINE_H 16 17 #include "X86.h" 18 #include "X86ELFWriterInfo.h" 19 #include "X86InstrInfo.h" 20 #include "X86ISelLowering.h" 21 #include "X86FrameLowering.h" 22 #include "X86JITInfo.h" 23 #include "X86SelectionDAGInfo.h" 24 #include "X86Subtarget.h" 25 #include "llvm/Target/TargetMachine.h" 26 #include "llvm/Target/TargetData.h" 27 #include "llvm/Target/TargetFrameLowering.h" 28 29 namespace llvm { 30 31 class formatted_raw_ostream; 32 class StringRef; 33 34 class X86TargetMachine : public LLVMTargetMachine { 35 X86Subtarget Subtarget; 36 X86FrameLowering FrameLowering; 37 X86ELFWriterInfo ELFWriterInfo; 38 39 public: 40 X86TargetMachine(const Target &T, StringRef TT, 41 StringRef CPU, StringRef FS, 42 Reloc::Model RM, CodeModel::Model CM, 43 bool is64Bit); 44 getInstrInfo()45 virtual const X86InstrInfo *getInstrInfo() const { 46 llvm_unreachable("getInstrInfo not implemented"); 47 } getFrameLowering()48 virtual const TargetFrameLowering *getFrameLowering() const { 49 return &FrameLowering; 50 } getJITInfo()51 virtual X86JITInfo *getJITInfo() { 52 llvm_unreachable("getJITInfo not implemented"); 53 } getSubtargetImpl()54 virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; } getTargetLowering()55 virtual const X86TargetLowering *getTargetLowering() const { 56 llvm_unreachable("getTargetLowering not implemented"); 57 } getSelectionDAGInfo()58 virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const { 59 llvm_unreachable("getSelectionDAGInfo not implemented"); 60 } getRegisterInfo()61 virtual const X86RegisterInfo *getRegisterInfo() const { 62 return &getInstrInfo()->getRegisterInfo(); 63 } getELFWriterInfo()64 virtual const X86ELFWriterInfo *getELFWriterInfo() const { 65 return Subtarget.isTargetELF() ? &ELFWriterInfo : 0; 66 } 67 68 // Set up the pass pipeline. 69 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel); 70 virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel); 71 virtual bool addPostRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel); 72 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel); 73 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, 74 JITCodeEmitter &JCE); 75 }; 76 77 /// X86_32TargetMachine - X86 32-bit target machine. 78 /// 79 class X86_32TargetMachine : public X86TargetMachine { 80 const TargetData DataLayout; // Calculates type size & alignment 81 X86InstrInfo InstrInfo; 82 X86SelectionDAGInfo TSInfo; 83 X86TargetLowering TLInfo; 84 X86JITInfo JITInfo; 85 public: 86 X86_32TargetMachine(const Target &T, StringRef TT, 87 StringRef CPU, StringRef FS, 88 Reloc::Model RM, CodeModel::Model CM); getTargetData()89 virtual const TargetData *getTargetData() const { return &DataLayout; } getTargetLowering()90 virtual const X86TargetLowering *getTargetLowering() const { 91 return &TLInfo; 92 } getSelectionDAGInfo()93 virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const { 94 return &TSInfo; 95 } getInstrInfo()96 virtual const X86InstrInfo *getInstrInfo() const { 97 return &InstrInfo; 98 } getJITInfo()99 virtual X86JITInfo *getJITInfo() { 100 return &JITInfo; 101 } 102 }; 103 104 /// X86_64TargetMachine - X86 64-bit target machine. 105 /// 106 class X86_64TargetMachine : public X86TargetMachine { 107 const TargetData DataLayout; // Calculates type size & alignment 108 X86InstrInfo InstrInfo; 109 X86SelectionDAGInfo TSInfo; 110 X86TargetLowering TLInfo; 111 X86JITInfo JITInfo; 112 public: 113 X86_64TargetMachine(const Target &T, StringRef TT, 114 StringRef CPU, StringRef FS, 115 Reloc::Model RM, CodeModel::Model CM); getTargetData()116 virtual const TargetData *getTargetData() const { return &DataLayout; } getTargetLowering()117 virtual const X86TargetLowering *getTargetLowering() const { 118 return &TLInfo; 119 } getSelectionDAGInfo()120 virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const { 121 return &TSInfo; 122 } getInstrInfo()123 virtual const X86InstrInfo *getInstrInfo() const { 124 return &InstrInfo; 125 } getJITInfo()126 virtual X86JITInfo *getJITInfo() { 127 return &JITInfo; 128 } 129 }; 130 131 } // End llvm namespace 132 133 #endif 134