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1; RUN: llc -regalloc=greedy < %s | FileCheck %s
2
3; LSR shouldn't introduce more induction variables than needed, increasing
4; register pressure and therefore spilling. There is more room for improvement
5; here.
6
7; CHECK: sub sp, #{{40|32|28|24}}
8
9; CHECK: %for.inc
10; CHECK: ldr{{(.w)?}} r{{.*}}, [sp, #
11; CHECK: ldr{{(.w)?}} r{{.*}}, [sp, #
12; CHECK: add
13
14target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
15target triple = "thumbv7-apple-macosx10.7.0"
16
17%struct.partition_entry = type { i32, i32, i64, i64 }
18
19define i32 @partition_overlap_check(%struct.partition_entry* nocapture %part, i32 %num_entries) nounwind readonly optsize ssp {
20entry:
21  %cmp79 = icmp sgt i32 %num_entries, 0
22  br i1 %cmp79, label %outer.loop, label %for.end72
23
24outer.loop:                                 ; preds = %for.inc69, %entry
25  %overlap.081 = phi i32 [ %overlap.4, %for.inc69 ], [ 0, %entry ]
26  %0 = phi i32 [ %inc71, %for.inc69 ], [ 0, %entry ]
27  %offset = getelementptr %struct.partition_entry* %part, i32 %0, i32 2
28  %len = getelementptr %struct.partition_entry* %part, i32 %0, i32 3
29  %tmp5 = load i64* %offset, align 4, !tbaa !0
30  %tmp15 = load i64* %len, align 4, !tbaa !0
31  %add = add nsw i64 %tmp15, %tmp5
32  br label %inner.loop
33
34inner.loop:                                       ; preds = %for.inc, %outer.loop
35  %overlap.178 = phi i32 [ %overlap.081, %outer.loop ], [ %overlap.4, %for.inc ]
36  %1 = phi i32 [ 0, %outer.loop ], [ %inc, %for.inc ]
37  %cmp23 = icmp eq i32 %0, %1
38  br i1 %cmp23, label %for.inc, label %if.end
39
40if.end:                                           ; preds = %inner.loop
41  %len39 = getelementptr %struct.partition_entry* %part, i32 %1, i32 3
42  %offset28 = getelementptr %struct.partition_entry* %part, i32 %1, i32 2
43  %tmp29 = load i64* %offset28, align 4, !tbaa !0
44  %tmp40 = load i64* %len39, align 4, !tbaa !0
45  %add41 = add nsw i64 %tmp40, %tmp29
46  %cmp44 = icmp sge i64 %tmp29, %tmp5
47  %cmp47 = icmp slt i64 %tmp29, %add
48  %or.cond = and i1 %cmp44, %cmp47
49  %overlap.2 = select i1 %or.cond, i32 1, i32 %overlap.178
50  %cmp52 = icmp sle i64 %add41, %add
51  %cmp56 = icmp sgt i64 %add41, %tmp5
52  %or.cond74 = and i1 %cmp52, %cmp56
53  %overlap.3 = select i1 %or.cond74, i32 1, i32 %overlap.2
54  %cmp61 = icmp sgt i64 %tmp29, %tmp5
55  %cmp65 = icmp slt i64 %add41, %add
56  %or.cond75 = or i1 %cmp61, %cmp65
57  br i1 %or.cond75, label %for.inc, label %if.then66
58
59if.then66:                                        ; preds = %if.end
60  br label %for.inc
61
62for.inc:                                          ; preds = %if.end, %if.then66, %inner.loop
63  %overlap.4 = phi i32 [ %overlap.178, %inner.loop ], [ 1, %if.then66 ], [ %overlap.3, %if.end ]
64  %inc = add nsw i32 %1, 1
65  %exitcond = icmp eq i32 %inc, %num_entries
66  br i1 %exitcond, label %for.inc69, label %inner.loop
67
68for.inc69:                                        ; preds = %for.inc
69  %inc71 = add nsw i32 %0, 1
70  %exitcond83 = icmp eq i32 %inc71, %num_entries
71  br i1 %exitcond83, label %for.end72, label %outer.loop
72
73for.end72:                                        ; preds = %for.inc69, %entry
74  %overlap.0.lcssa = phi i32 [ 0, %entry ], [ %overlap.4, %for.inc69 ]
75  ret i32 %overlap.0.lcssa
76}
77
78!0 = metadata !{metadata !"long long", metadata !1}
79!1 = metadata !{metadata !"omnipotent char", metadata !2}
80!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
81