1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s 2 3; CHECK: vandpd 4define <4 x double> @andpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { 5entry: 6 %0 = bitcast <4 x double> %x to <4 x i64> 7 %1 = bitcast <4 x double> %y to <4 x i64> 8 %and.i = and <4 x i64> %0, %1 9 %2 = bitcast <4 x i64> %and.i to <4 x double> 10 ret <4 x double> %2 11} 12 13; CHECK: vandpd LCP{{.*}}(%rip) 14define <4 x double> @andpd256fold(<4 x double> %y) nounwind uwtable readnone ssp { 15entry: 16 %0 = bitcast <4 x double> %y to <4 x i64> 17 %and.i = and <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507> 18 %1 = bitcast <4 x i64> %and.i to <4 x double> 19 ret <4 x double> %1 20} 21 22; CHECK: vandps 23define <8 x float> @andps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { 24entry: 25 %0 = bitcast <8 x float> %x to <8 x i32> 26 %1 = bitcast <8 x float> %y to <8 x i32> 27 %and.i = and <8 x i32> %0, %1 28 %2 = bitcast <8 x i32> %and.i to <8 x float> 29 ret <8 x float> %2 30} 31 32; CHECK: vandps LCP{{.*}}(%rip) 33define <8 x float> @andps256fold(<8 x float> %y) nounwind uwtable readnone ssp { 34entry: 35 %0 = bitcast <8 x float> %y to <8 x i32> 36 %and.i = and <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938> 37 %1 = bitcast <8 x i32> %and.i to <8 x float> 38 ret <8 x float> %1 39} 40 41; CHECK: vxorpd 42define <4 x double> @xorpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { 43entry: 44 %0 = bitcast <4 x double> %x to <4 x i64> 45 %1 = bitcast <4 x double> %y to <4 x i64> 46 %xor.i = xor <4 x i64> %0, %1 47 %2 = bitcast <4 x i64> %xor.i to <4 x double> 48 ret <4 x double> %2 49} 50 51; CHECK: vxorpd LCP{{.*}}(%rip) 52define <4 x double> @xorpd256fold(<4 x double> %y) nounwind uwtable readnone ssp { 53entry: 54 %0 = bitcast <4 x double> %y to <4 x i64> 55 %xor.i = xor <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507> 56 %1 = bitcast <4 x i64> %xor.i to <4 x double> 57 ret <4 x double> %1 58} 59 60; CHECK: vxorps 61define <8 x float> @xorps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { 62entry: 63 %0 = bitcast <8 x float> %x to <8 x i32> 64 %1 = bitcast <8 x float> %y to <8 x i32> 65 %xor.i = xor <8 x i32> %0, %1 66 %2 = bitcast <8 x i32> %xor.i to <8 x float> 67 ret <8 x float> %2 68} 69 70; CHECK: vxorps LCP{{.*}}(%rip) 71define <8 x float> @xorps256fold(<8 x float> %y) nounwind uwtable readnone ssp { 72entry: 73 %0 = bitcast <8 x float> %y to <8 x i32> 74 %xor.i = xor <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938> 75 %1 = bitcast <8 x i32> %xor.i to <8 x float> 76 ret <8 x float> %1 77} 78 79; CHECK: vorpd 80define <4 x double> @orpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { 81entry: 82 %0 = bitcast <4 x double> %x to <4 x i64> 83 %1 = bitcast <4 x double> %y to <4 x i64> 84 %or.i = or <4 x i64> %0, %1 85 %2 = bitcast <4 x i64> %or.i to <4 x double> 86 ret <4 x double> %2 87} 88 89; CHECK: vorpd LCP{{.*}}(%rip) 90define <4 x double> @orpd256fold(<4 x double> %y) nounwind uwtable readnone ssp { 91entry: 92 %0 = bitcast <4 x double> %y to <4 x i64> 93 %or.i = or <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507> 94 %1 = bitcast <4 x i64> %or.i to <4 x double> 95 ret <4 x double> %1 96} 97 98; CHECK: vorps 99define <8 x float> @orps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { 100entry: 101 %0 = bitcast <8 x float> %x to <8 x i32> 102 %1 = bitcast <8 x float> %y to <8 x i32> 103 %or.i = or <8 x i32> %0, %1 104 %2 = bitcast <8 x i32> %or.i to <8 x float> 105 ret <8 x float> %2 106} 107 108; CHECK: vorps LCP{{.*}}(%rip) 109define <8 x float> @orps256fold(<8 x float> %y) nounwind uwtable readnone ssp { 110entry: 111 %0 = bitcast <8 x float> %y to <8 x i32> 112 %or.i = or <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938> 113 %1 = bitcast <8 x i32> %or.i to <8 x float> 114 ret <8 x float> %1 115} 116 117; CHECK: vandnpd 118define <4 x double> @andnotpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { 119entry: 120 %0 = bitcast <4 x double> %x to <4 x i64> 121 %neg.i = xor <4 x i64> %0, <i64 -1, i64 -1, i64 -1, i64 -1> 122 %1 = bitcast <4 x double> %y to <4 x i64> 123 %and.i = and <4 x i64> %1, %neg.i 124 %2 = bitcast <4 x i64> %and.i to <4 x double> 125 ret <4 x double> %2 126} 127 128; CHECK: vandnpd (% 129define <4 x double> @andnotpd256fold(<4 x double> %y, <4 x double>* nocapture %x) nounwind uwtable readonly ssp { 130entry: 131 %tmp2 = load <4 x double>* %x, align 32 132 %0 = bitcast <4 x double> %y to <4 x i64> 133 %neg.i = xor <4 x i64> %0, <i64 -1, i64 -1, i64 -1, i64 -1> 134 %1 = bitcast <4 x double> %tmp2 to <4 x i64> 135 %and.i = and <4 x i64> %1, %neg.i 136 %2 = bitcast <4 x i64> %and.i to <4 x double> 137 ret <4 x double> %2 138} 139 140; CHECK: vandnps 141define <8 x float> @andnotps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { 142entry: 143 %0 = bitcast <8 x float> %x to <8 x i32> 144 %neg.i = xor <8 x i32> %0, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 145 %1 = bitcast <8 x float> %y to <8 x i32> 146 %and.i = and <8 x i32> %1, %neg.i 147 %2 = bitcast <8 x i32> %and.i to <8 x float> 148 ret <8 x float> %2 149} 150 151; CHECK: vandnps (% 152define <8 x float> @andnotps256fold(<8 x float> %y, <8 x float>* nocapture %x) nounwind uwtable readonly ssp { 153entry: 154 %tmp2 = load <8 x float>* %x, align 32 155 %0 = bitcast <8 x float> %y to <8 x i32> 156 %neg.i = xor <8 x i32> %0, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 157 %1 = bitcast <8 x float> %tmp2 to <8 x i32> 158 %and.i = and <8 x i32> %1, %neg.i 159 %2 = bitcast <8 x i32> %and.i to <8 x float> 160 ret <8 x float> %2 161} 162 163;;; Test that basic 2 x i64 logic use the integer version on AVX 164 165; CHECK: vpandn %xmm 166define <2 x i64> @vpandn(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp { 167entry: 168 %y = xor <2 x i64> %a, <i64 -1, i64 -1> 169 %x = and <2 x i64> %a, %y 170 ret <2 x i64> %x 171} 172 173; CHECK: vpand %xmm 174define <2 x i64> @vpand(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp { 175entry: 176 %x = and <2 x i64> %a, %b 177 ret <2 x i64> %x 178} 179 180