1; RUN: llc < %s -march=x86 -mattr=+sse2 2; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd | count 1 3; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movd | count 2 4; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep movq | count 3 5; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xor 6 7define <4 x i32> @t1(i32 %a) nounwind { 8entry: 9 %tmp = insertelement <4 x i32> undef, i32 %a, i32 0 10 %tmp6 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp, <4 x i32> < i32 4, i32 1, i32 2, i32 3 > ; <<4 x i32>> [#uses=1] 11 ret <4 x i32> %tmp6 12} 13 14define <2 x i64> @t2(i64 %a) nounwind { 15entry: 16 %tmp = insertelement <2 x i64> undef, i64 %a, i32 0 17 %tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %tmp, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1] 18 ret <2 x i64> %tmp6 19} 20 21define <2 x i64> @t3(<2 x i64>* %a) nounwind { 22entry: 23 %tmp4 = load <2 x i64>* %a, align 16 ; <<2 x i64>> [#uses=1] 24 %tmp6 = bitcast <2 x i64> %tmp4 to <4 x i32> ; <<4 x i32>> [#uses=1] 25 %tmp7 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp6, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x i32>> [#uses=1] 26 %tmp8 = bitcast <4 x i32> %tmp7 to <2 x i64> ; <<2 x i64>> [#uses=1] 27 ret <2 x i64> %tmp8 28} 29 30define <2 x i64> @t4(<2 x i64> %a) nounwind { 31entry: 32 %tmp5 = bitcast <2 x i64> %a to <4 x i32> ; <<4 x i32>> [#uses=1] 33 %tmp6 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %tmp5, <4 x i32> < i32 4, i32 5, i32 2, i32 3 > ; <<4 x i32>> [#uses=1] 34 %tmp7 = bitcast <4 x i32> %tmp6 to <2 x i64> ; <<2 x i64>> [#uses=1] 35 ret <2 x i64> %tmp7 36} 37 38define <2 x i64> @t5(<2 x i64> %a) nounwind { 39entry: 40 %tmp6 = shufflevector <2 x i64> zeroinitializer, <2 x i64> %a, <2 x i32> < i32 2, i32 1 > ; <<4 x i32>> [#uses=1] 41 ret <2 x i64> %tmp6 42} 43