1; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s 2 3; test vector shifts converted to proper SSE2 vector shifts when the shift 4; amounts are the same when using a shuffle splat. 5 6define void @shift1a(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind { 7entry: 8; CHECK: shift1a: 9; CHECK: psllq 10 %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 0> 11 %shl = shl <2 x i64> %val, %shamt 12 store <2 x i64> %shl, <2 x i64>* %dst 13 ret void 14} 15 16; shift1b can't use a packed shift 17define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind { 18entry: 19; CHECK: shift1b: 20; CHECK: shll 21 %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 1> 22 %shl = shl <2 x i64> %val, %shamt 23 store <2 x i64> %shl, <2 x i64>* %dst 24 ret void 25} 26 27define void @shift2a(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { 28entry: 29; CHECK: shift2a: 30; CHECK: pslld 31 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> 32 %shl = shl <4 x i32> %val, %shamt 33 store <4 x i32> %shl, <4 x i32>* %dst 34 ret void 35} 36 37define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { 38entry: 39; CHECK: shift2b: 40; CHECK: pslld 41 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 1, i32 1> 42 %shl = shl <4 x i32> %val, %shamt 43 store <4 x i32> %shl, <4 x i32>* %dst 44 ret void 45} 46 47define void @shift2c(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { 48entry: 49; CHECK: shift2c: 50; CHECK: pslld 51 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> 52 %shl = shl <4 x i32> %val, %shamt 53 store <4 x i32> %shl, <4 x i32>* %dst 54 ret void 55} 56 57define void @shift3a(<8 x i16> %val, <8 x i16>* %dst, <8 x i16> %amt) nounwind { 58entry: 59; CHECK: shift3a: 60; CHECK: movzwl 61; CHECK: psllw 62 %shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6> 63 %shl = shl <8 x i16> %val, %shamt 64 store <8 x i16> %shl, <8 x i16>* %dst 65 ret void 66} 67 68define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { 69entry: 70; CHECK: shift3b: 71; CHECK: movzwl 72; CHECK: psllw 73 %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 74 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 75 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 76 %3 = insertelement <8 x i16> %0, i16 %amt, i32 3 77 %4 = insertelement <8 x i16> %0, i16 %amt, i32 4 78 %5 = insertelement <8 x i16> %0, i16 %amt, i32 5 79 %6 = insertelement <8 x i16> %0, i16 %amt, i32 6 80 %7 = insertelement <8 x i16> %0, i16 %amt, i32 7 81 %shl = shl <8 x i16> %val, %7 82 store <8 x i16> %shl, <8 x i16>* %dst 83 ret void 84} 85 86