1; RUN: opt < %s -loop-rotate -licm -loop-unswitch -disable-output 2 3define i32 @main(i32 %argc, i8** %argv) { 4entry: 5 br label %bb 6 7bb: ; preds = %bb56, %entry 8 br label %bb7 9 10bb7: ; preds = %bb7, %bb 11 %tmp39 = load <4 x float>* null ; <<4 x float>> [#uses=1] 12 %tmp40 = fadd <4 x float> %tmp39, < float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, float 0.000000e+00 > ; <<4 x float>> [#uses=1] 13 %tmp43 = fadd <4 x float> %tmp40, < float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 2.000000e+00 > ; <<4 x float>> [#uses=1] 14 %tmp46 = fadd <4 x float> %tmp43, < float 3.000000e+00, float 0.000000e+00, float 2.000000e+00, float 4.000000e+00 > ; <<4 x float>> [#uses=1] 15 %tmp49 = fadd <4 x float> %tmp46, < float 0.000000e+00, float 4.000000e+00, float 6.000000e+00, float 1.000000e+00 > ; <<4 x float>> [#uses=1] 16 store <4 x float> %tmp49, <4 x float>* null 17 br i1 false, label %bb7, label %bb56 18 19bb56: ; preds = %bb7 20 br i1 false, label %bb, label %bb64 21 22bb64: ; preds = %bb56 23 ret i32 0 24} 25