1tblgen - Target Description To C++ Code Generator 2================================================= 3 4SYNOPSIS 5-------- 6 7:program:`tblgen` [*options*] [*filename*] 8 9DESCRIPTION 10----------- 11 12:program:`tblgen` translates from target description (``.td``) files into C++ 13code that can be included in the definition of an LLVM target library. Most 14users of LLVM will not need to use this program. It is only for assisting with 15writing an LLVM target backend. 16 17The input and output of :program:`tblgen` is beyond the scope of this short 18introduction; please see the :doc:`introduction to TableGen 19<../TableGen/index>`. 20 21The *filename* argument specifies the name of a Target Description (``.td``) 22file to read as input. 23 24OPTIONS 25------- 26 27.. program:: tblgen 28 29.. option:: -help 30 31 Print a summary of command line options. 32 33.. option:: -o filename 34 35 Specify the output file name. If ``filename`` is ``-``, then 36 :program:`tblgen` sends its output to standard output. 37 38.. option:: -I directory 39 40 Specify where to find other target description files for inclusion. The 41 ``directory`` value should be a full or partial path to a directory that 42 contains target description files. 43 44.. option:: -asmparsernum N 45 46 Make -gen-asm-parser emit assembly writer number ``N``. 47 48.. option:: -asmwriternum N 49 50 Make -gen-asm-writer emit assembly writer number ``N``. 51 52.. option:: -class className 53 54 Print the enumeration list for this class. 55 56.. option:: -print-records 57 58 Print all records to standard output (default). 59 60.. option:: -dump-json 61 62 Print a JSON representation of all records, suitable for further 63 automated processing. 64 65.. option:: -print-enums 66 67 Print enumeration values for a class. 68 69.. option:: -print-sets 70 71 Print expanded sets for testing DAG exprs. 72 73.. option:: -gen-emitter 74 75 Generate machine code emitter. 76 77.. option:: -gen-register-info 78 79 Generate registers and register classes info. 80 81.. option:: -gen-instr-info 82 83 Generate instruction descriptions. 84 85.. option:: -gen-asm-writer 86 87 Generate the assembly writer. 88 89.. option:: -gen-disassembler 90 91 Generate disassembler. 92 93.. option:: -gen-pseudo-lowering 94 95 Generate pseudo instruction lowering. 96 97.. option:: -gen-dag-isel 98 99 Generate a DAG (Directed Acycle Graph) instruction selector. 100 101.. option:: -gen-asm-matcher 102 103 Generate assembly instruction matcher. 104 105.. option:: -gen-dfa-packetizer 106 107 Generate DFA Packetizer for VLIW targets. 108 109.. option:: -gen-fast-isel 110 111 Generate a "fast" instruction selector. 112 113.. option:: -gen-subtarget 114 115 Generate subtarget enumerations. 116 117.. option:: -gen-intrinsic-enums 118 119 Generate intrinsic enums. 120 121.. option:: -gen-intrinsic-impl 122 123 Generate intrinsic implementation. 124 125.. option:: -gen-tgt-intrinsic 126 127 Generate target intrinsic information. 128 129.. option:: -gen-enhanced-disassembly-info 130 131 Generate enhanced disassembly info. 132 133.. option:: -version 134 135 Show the version number of this program. 136 137EXIT STATUS 138----------- 139 140If :program:`tblgen` succeeds, it will exit with 0. Otherwise, if an error 141occurs, it will exit with a non-zero value. 142