1//===-- NVPTXRegisterInfo.td - NVPTX Register defs ---------*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10//===----------------------------------------------------------------------===// 11// Declarations that describe the PTX register file 12//===----------------------------------------------------------------------===// 13 14class NVPTXReg<string n> : Register<n> { 15 let Namespace = "NVPTX"; 16} 17 18class NVPTXRegClass<list<ValueType> regTypes, int alignment, dag regList> 19 : RegisterClass <"NVPTX", regTypes, alignment, regList>; 20 21//===----------------------------------------------------------------------===// 22// Registers 23//===----------------------------------------------------------------------===// 24 25// Special Registers used as stack pointer 26def VRFrame : NVPTXReg<"%SP">; 27def VRFrameLocal : NVPTXReg<"%SPL">; 28 29// Special Registers used as the stack 30def VRDepot : NVPTXReg<"%Depot">; 31 32// We use virtual registers, but define a few physical registers here to keep 33// SDAG and the MachineInstr layers happy. 34foreach i = 0-4 in { 35 def P#i : NVPTXReg<"%p"#i>; // Predicate 36 def RS#i : NVPTXReg<"%rs"#i>; // 16-bit 37 def R#i : NVPTXReg<"%r"#i>; // 32-bit 38 def RL#i : NVPTXReg<"%rd"#i>; // 64-bit 39 def H#i : NVPTXReg<"%h"#i>; // 16-bit float 40 def HH#i : NVPTXReg<"%hh"#i>; // 2x16-bit float 41 def F#i : NVPTXReg<"%f"#i>; // 32-bit float 42 def FL#i : NVPTXReg<"%fd"#i>; // 64-bit float 43 44 // Arguments 45 def ia#i : NVPTXReg<"%ia"#i>; 46 def la#i : NVPTXReg<"%la"#i>; 47 def fa#i : NVPTXReg<"%fa"#i>; 48 def da#i : NVPTXReg<"%da"#i>; 49} 50 51foreach i = 0-31 in { 52 def ENVREG#i : NVPTXReg<"%envreg"#i>; 53} 54 55//===----------------------------------------------------------------------===// 56// Register classes 57//===----------------------------------------------------------------------===// 58def Int1Regs : NVPTXRegClass<[i1], 8, (add (sequence "P%u", 0, 4))>; 59def Int16Regs : NVPTXRegClass<[i16], 16, (add (sequence "RS%u", 0, 4))>; 60def Int32Regs : NVPTXRegClass<[i32], 32, (add (sequence "R%u", 0, 4))>; 61def Int64Regs : NVPTXRegClass<[i64], 64, (add (sequence "RL%u", 0, 4))>; 62def Float16Regs : NVPTXRegClass<[f16], 16, (add (sequence "H%u", 0, 4))>; 63def Float16x2Regs : NVPTXRegClass<[v2f16], 32, (add (sequence "HH%u", 0, 4))>; 64def Float32Regs : NVPTXRegClass<[f32], 32, (add (sequence "F%u", 0, 4))>; 65def Float64Regs : NVPTXRegClass<[f64], 64, (add (sequence "FL%u", 0, 4))>; 66def Int32ArgRegs : NVPTXRegClass<[i32], 32, (add (sequence "ia%u", 0, 4))>; 67def Int64ArgRegs : NVPTXRegClass<[i64], 64, (add (sequence "la%u", 0, 4))>; 68def Float32ArgRegs : NVPTXRegClass<[f32], 32, (add (sequence "fa%u", 0, 4))>; 69def Float64ArgRegs : NVPTXRegClass<[f64], 64, (add (sequence "da%u", 0, 4))>; 70 71// Read NVPTXRegisterInfo.cpp to see how VRFrame and VRDepot are used. 72def SpecialRegs : NVPTXRegClass<[i32], 32, (add VRFrame, VRFrameLocal, VRDepot, 73 (sequence "ENVREG%u", 0, 31))>; 74