1 //===-- PPCMCTargetDesc.h - PowerPC Target Descriptions ---------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides PowerPC specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCMCTARGETDESC_H
15 #define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCMCTARGETDESC_H
16
17 // GCC #defines PPC on Linux but we use it as our namespace name
18 #undef PPC
19
20 #include "llvm/Support/MathExtras.h"
21 #include <cstdint>
22 #include <memory>
23
24 namespace llvm {
25
26 class MCAsmBackend;
27 class MCCodeEmitter;
28 class MCContext;
29 class MCInstrInfo;
30 class MCObjectTargetWriter;
31 class MCRegisterInfo;
32 class MCSubtargetInfo;
33 class MCTargetOptions;
34 class Target;
35 class Triple;
36 class StringRef;
37 class raw_pwrite_stream;
38
39 Target &getThePPC32Target();
40 Target &getThePPC64Target();
41 Target &getThePPC64LETarget();
42
43 MCCodeEmitter *createPPCMCCodeEmitter(const MCInstrInfo &MCII,
44 const MCRegisterInfo &MRI,
45 MCContext &Ctx);
46
47 MCAsmBackend *createPPCAsmBackend(const Target &T, const MCSubtargetInfo &STI,
48 const MCRegisterInfo &MRI,
49 const MCTargetOptions &Options);
50
51 /// Construct an PPC ELF object writer.
52 std::unique_ptr<MCObjectTargetWriter> createPPCELFObjectWriter(bool Is64Bit,
53 uint8_t OSABI);
54 /// Construct a PPC Mach-O object writer.
55 std::unique_ptr<MCObjectTargetWriter>
56 createPPCMachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype);
57
58 /// Returns true iff Val consists of one contiguous run of 1s with any number of
59 /// 0s on either side. The 1s are allowed to wrap from LSB to MSB, so
60 /// 0x000FFF0, 0x0000FFFF, and 0xFF0000FF are all runs. 0x0F0F0000 is not,
61 /// since all 1s are not contiguous.
isRunOfOnes(unsigned Val,unsigned & MB,unsigned & ME)62 static inline bool isRunOfOnes(unsigned Val, unsigned &MB, unsigned &ME) {
63 if (!Val)
64 return false;
65
66 if (isShiftedMask_32(Val)) {
67 // look for the first non-zero bit
68 MB = countLeadingZeros(Val);
69 // look for the first zero bit after the run of ones
70 ME = countLeadingZeros((Val - 1) ^ Val);
71 return true;
72 } else {
73 Val = ~Val; // invert mask
74 if (isShiftedMask_32(Val)) {
75 // effectively look for the first zero bit
76 ME = countLeadingZeros(Val) - 1;
77 // effectively look for the first one bit after the run of zeros
78 MB = countLeadingZeros((Val - 1) ^ Val) + 1;
79 return true;
80 }
81 }
82 // no run present
83 return false;
84 }
85
86 } // end namespace llvm
87
88 // Generated files will use "namespace PPC". To avoid symbol clash,
89 // undefine PPC here. PPC may be predefined on some hosts.
90 #undef PPC
91
92 // Defines symbolic names for PowerPC registers. This defines a mapping from
93 // register name to register number.
94 //
95 #define GET_REGINFO_ENUM
96 #include "PPCGenRegisterInfo.inc"
97
98 // Defines symbolic names for the PowerPC instructions.
99 //
100 #define GET_INSTRINFO_ENUM
101 #define GET_INSTRINFO_SCHED_ENUM
102 #include "PPCGenInstrInfo.inc"
103
104 #define GET_SUBTARGETINFO_ENUM
105 #include "PPCGenSubtargetInfo.inc"
106
107 #endif // LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCMCTARGETDESC_H
108