1 //===-- PPCFrameLowering.h - Define frame lowering for PowerPC --*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H 14 #define LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H 15 16 #include "PPC.h" 17 #include "llvm/ADT/STLExtras.h" 18 #include "llvm/CodeGen/TargetFrameLowering.h" 19 #include "llvm/Target/TargetMachine.h" 20 21 namespace llvm { 22 class PPCSubtarget; 23 24 class PPCFrameLowering: public TargetFrameLowering { 25 const PPCSubtarget &Subtarget; 26 const unsigned ReturnSaveOffset; 27 const unsigned TOCSaveOffset; 28 const unsigned FramePointerSaveOffset; 29 const unsigned LinkageSize; 30 const unsigned BasePointerSaveOffset; 31 32 /** 33 * Find register[s] that can be used in function prologue and epilogue 34 * 35 * Find register[s] that can be use as scratch register[s] in function 36 * prologue and epilogue to save various registers (Link Register, Base 37 * Pointer, etc.). Prefer R0/R12, if available. Otherwise choose whatever 38 * register[s] are available. 39 * 40 * This method will return true if it is able to find enough unique scratch 41 * registers (1 or 2 depending on the requirement). If it is unable to find 42 * enough available registers in the block, it will return false and set 43 * any passed output parameter that corresponds to a required unique register 44 * to PPC::NoRegister. 45 * 46 * \param[in] MBB The machine basic block to find an available register for 47 * \param[in] UseAtEnd Specify whether the scratch register will be used at 48 * the end of the basic block (i.e., will the scratch 49 * register kill a register defined in the basic block) 50 * \param[in] TwoUniqueRegsRequired Specify whether this basic block will 51 * require two unique scratch registers. 52 * \param[out] SR1 The scratch register to use 53 * \param[out] SR2 The second scratch register. If this pointer is not null 54 * the function will attempt to set it to an available 55 * register regardless of whether there is a hard requirement 56 * for two unique scratch registers. 57 * \return true if the required number of registers was found. 58 * false if the required number of scratch register weren't available. 59 * If either output parameter refers to a required scratch register 60 * that isn't available, it will be set to an invalid value. 61 */ 62 bool findScratchRegister(MachineBasicBlock *MBB, 63 bool UseAtEnd, 64 bool TwoUniqueRegsRequired = false, 65 unsigned *SR1 = nullptr, 66 unsigned *SR2 = nullptr) const; 67 bool twoUniqueScratchRegsRequired(MachineBasicBlock *MBB) const; 68 69 /** 70 * Create branch instruction for PPC::TCRETURN* (tail call return) 71 * 72 * \param[in] MBB that is terminated by PPC::TCRETURN* 73 */ 74 void createTailCallBranchInstr(MachineBasicBlock &MBB) const; 75 76 public: 77 PPCFrameLowering(const PPCSubtarget &STI); 78 79 unsigned determineFrameLayout(MachineFunction &MF, 80 bool UpdateMF = true, 81 bool UseEstimate = false) const; 82 83 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into 84 /// the function. 85 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 86 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 87 88 bool hasFP(const MachineFunction &MF) const override; 89 bool needsFP(const MachineFunction &MF) const; 90 void replaceFPWithRealFP(MachineFunction &MF) const; 91 92 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, 93 RegScavenger *RS = nullptr) const override; 94 void processFunctionBeforeFrameFinalized(MachineFunction &MF, 95 RegScavenger *RS = nullptr) const override; 96 void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const; 97 98 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 99 MachineBasicBlock::iterator MI, 100 const std::vector<CalleeSavedInfo> &CSI, 101 const TargetRegisterInfo *TRI) const override; 102 103 MachineBasicBlock::iterator 104 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 105 MachineBasicBlock::iterator I) const override; 106 107 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 108 MachineBasicBlock::iterator MI, 109 std::vector<CalleeSavedInfo> &CSI, 110 const TargetRegisterInfo *TRI) const override; 111 112 /// targetHandlesStackFrameRounding - Returns true if the target is 113 /// responsible for rounding up the stack frame (probably at emitPrologue 114 /// time). targetHandlesStackFrameRounding()115 bool targetHandlesStackFrameRounding() const override { return true; } 116 117 /// getReturnSaveOffset - Return the previous frame offset to save the 118 /// return address. getReturnSaveOffset()119 unsigned getReturnSaveOffset() const { return ReturnSaveOffset; } 120 121 /// getTOCSaveOffset - Return the previous frame offset to save the 122 /// TOC register -- 64-bit SVR4 ABI only. getTOCSaveOffset()123 unsigned getTOCSaveOffset() const { return TOCSaveOffset; } 124 125 /// getFramePointerSaveOffset - Return the previous frame offset to save the 126 /// frame pointer. getFramePointerSaveOffset()127 unsigned getFramePointerSaveOffset() const { return FramePointerSaveOffset; } 128 129 /// getBasePointerSaveOffset - Return the previous frame offset to save the 130 /// base pointer. getBasePointerSaveOffset()131 unsigned getBasePointerSaveOffset() const { return BasePointerSaveOffset; } 132 133 /// getLinkageSize - Return the size of the PowerPC ABI linkage area. 134 /// getLinkageSize()135 unsigned getLinkageSize() const { return LinkageSize; } 136 137 const SpillSlot * 138 getCalleeSavedSpillSlots(unsigned &NumEntries) const override; 139 140 bool enableShrinkWrapping(const MachineFunction &MF) const override; 141 142 /// Methods used by shrink wrapping to determine if MBB can be used for the 143 /// function prologue/epilogue. 144 bool canUseAsPrologue(const MachineBasicBlock &MBB) const override; 145 bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override; 146 }; 147 } // End llvm namespace 148 149 #endif 150