1 //===-- RISCVRegisterInfo.h - RISCV Register Information Impl ---*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the RISCV implementation of the TargetRegisterInfo class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_RISCV_RISCVREGISTERINFO_H 15 #define LLVM_LIB_TARGET_RISCV_RISCVREGISTERINFO_H 16 17 #include "llvm/CodeGen/TargetRegisterInfo.h" 18 19 #define GET_REGINFO_HEADER 20 #include "RISCVGenRegisterInfo.inc" 21 22 namespace llvm { 23 24 struct RISCVRegisterInfo : public RISCVGenRegisterInfo { 25 26 RISCVRegisterInfo(unsigned HwMode); 27 28 const uint32_t *getCallPreservedMask(const MachineFunction &MF, 29 CallingConv::ID) const override; 30 31 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override; 32 33 BitVector getReservedRegs(const MachineFunction &MF) const override; 34 35 bool isConstantPhysReg(unsigned PhysReg) const override; 36 37 const uint32_t *getNoPreservedMask() const override; 38 39 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, 40 unsigned FIOperandNum, 41 RegScavenger *RS = nullptr) const override; 42 43 unsigned getFrameRegister(const MachineFunction &MF) const override; 44 requiresRegisterScavengingRISCVRegisterInfo45 bool requiresRegisterScavenging(const MachineFunction &MF) const override { 46 return true; 47 } 48 requiresFrameIndexScavengingRISCVRegisterInfo49 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override { 50 return true; 51 } 52 trackLivenessAfterRegAllocRISCVRegisterInfo53 bool trackLivenessAfterRegAlloc(const MachineFunction &) const override { 54 return true; 55 } 56 }; 57 } 58 59 #endif 60