1; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s 2 3define <2 x float> @cvtf32fxpu(<2 x i32> %a) nounwind readnone ssp { 4; CHECK-LABEL: cvtf32fxpu: 5; CHECK: ucvtf.2s v0, v0, #9 6; CHECK: ret 7 %vcvt_n1 = tail call <2 x float> @llvm.aarch64.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32> %a, i32 9) 8 ret <2 x float> %vcvt_n1 9} 10 11define <2 x float> @cvtf32fxps(<2 x i32> %a) nounwind readnone ssp { 12; CHECK-LABEL: cvtf32fxps: 13; CHECK: scvtf.2s v0, v0, #12 14; CHECK: ret 15 %vcvt_n1 = tail call <2 x float> @llvm.aarch64.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32> %a, i32 12) 16 ret <2 x float> %vcvt_n1 17} 18 19define <4 x float> @cvtqf32fxpu(<4 x i32> %a) nounwind readnone ssp { 20; CHECK-LABEL: cvtqf32fxpu: 21; CHECK: ucvtf.4s v0, v0, #18 22; CHECK: ret 23 %vcvt_n1 = tail call <4 x float> @llvm.aarch64.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32> %a, i32 18) 24 ret <4 x float> %vcvt_n1 25} 26 27define <4 x float> @cvtqf32fxps(<4 x i32> %a) nounwind readnone ssp { 28; CHECK-LABEL: cvtqf32fxps: 29; CHECK: scvtf.4s v0, v0, #30 30; CHECK: ret 31 %vcvt_n1 = tail call <4 x float> @llvm.aarch64.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32> %a, i32 30) 32 ret <4 x float> %vcvt_n1 33} 34define <2 x double> @f1(<2 x i64> %a) nounwind readnone ssp { 35 %vcvt_n1 = tail call <2 x double> @llvm.aarch64.neon.vcvtfxu2fp.v2f64.v2i64(<2 x i64> %a, i32 12) 36 ret <2 x double> %vcvt_n1 37} 38 39define <2 x double> @f2(<2 x i64> %a) nounwind readnone ssp { 40 %vcvt_n1 = tail call <2 x double> @llvm.aarch64.neon.vcvtfxs2fp.v2f64.v2i64(<2 x i64> %a, i32 9) 41 ret <2 x double> %vcvt_n1 42} 43 44declare <4 x float> @llvm.aarch64.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone 45declare <4 x float> @llvm.aarch64.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone 46declare <2 x float> @llvm.aarch64.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone 47declare <2 x float> @llvm.aarch64.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone 48declare <2 x double> @llvm.aarch64.neon.vcvtfxu2fp.v2f64.v2i64(<2 x i64>, i32) nounwind readnone 49declare <2 x double> @llvm.aarch64.neon.vcvtfxs2fp.v2f64.v2i64(<2 x i64>, i32) nounwind readnone 50