1; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-bcc-offset-bits=3 < %s | FileCheck %s 2 3; CHECK-LABEL: invert_bcc: 4; CHECK: fcmp s0, s1 5; CHECK-NEXT: b.eq [[JUMP_BB1:LBB[0-9]+_[0-9]+]] 6; CHECK-NEXT: b [[JUMP_BB2:LBB[0-9]+_[0-9]+]] 7 8; CHECK-NEXT: [[JUMP_BB1]]: 9; CHECK-NEXT: b [[BB1:LBB[0-9]+_[0-9]+]] 10 11; CHECK-NEXT: [[JUMP_BB2]]: 12; CHECK-NEXT: b.vc [[BB2:LBB[0-9]+_[0-9]+]] 13; CHECK-NEXT: b [[BB1]] 14 15; CHECK: [[BB2]]: ; %bb2 16; CHECK: mov w{{[0-9]+}}, #9 17; CHECK: ret 18 19; CHECK: [[BB1]]: ; %bb1 20; CHECK: mov w{{[0-9]+}}, #42 21; CHECK: ret 22 23define i32 @invert_bcc(float %x, float %y) #0 { 24 %1 = fcmp ueq float %x, %y 25 br i1 %1, label %bb1, label %bb2 26 27bb2: 28 call void asm sideeffect 29 "nop 30 nop", 31 ""() #0 32 store volatile i32 9, i32* undef 33 ret i32 1 34 35bb1: 36 store volatile i32 42, i32* undef 37 ret i32 0 38} 39 40declare i32 @foo() #0 41 42; CHECK-LABEL: _block_split: 43; CHECK: cmp w0, #5 44; CHECK-NEXT: b.eq [[LONG_BR_BB:LBB[0-9]+_[0-9]+]] 45; CHECK-NEXT: b [[LOR_LHS_FALSE_BB:LBB[0-9]+_[0-9]+]] 46 47; CHECK: [[LONG_BR_BB]]: 48; CHECK-NEXT: b [[IF_THEN_BB:LBB[0-9]+_[0-9]+]] 49 50; CHECK: [[LOR_LHS_FALSE_BB]]: 51; CHECK: cmp w{{[0-9]+}}, #16 52; CHECK-NEXT: b.le [[IF_THEN_BB]] 53; CHECK-NEXT: b [[IF_END_BB:LBB[0-9]+_[0-9]+]] 54 55; CHECK: [[IF_THEN_BB]]: 56; CHECK: bl _foo 57; CHECK-NOT: b L 58 59; CHECK: [[IF_END_BB]]: 60; CHECK: #0x7 61; CHECK: ret 62define i32 @block_split(i32 %a, i32 %b) #0 { 63entry: 64 %cmp = icmp eq i32 %a, 5 65 br i1 %cmp, label %if.then, label %lor.lhs.false 66 67lor.lhs.false: ; preds = %entry 68 %cmp1 = icmp slt i32 %b, 7 69 %mul = shl nsw i32 %b, 1 70 %add = add nsw i32 %b, 1 71 %cond = select i1 %cmp1, i32 %mul, i32 %add 72 %cmp2 = icmp slt i32 %cond, 17 73 br i1 %cmp2, label %if.then, label %if.end 74 75if.then: ; preds = %lor.lhs.false, %entry 76 %call = tail call i32 @foo() 77 br label %if.end 78 79if.end: ; preds = %if.then, %lor.lhs.false 80 ret i32 7 81} 82 83attributes #0 = { nounwind } 84