1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ISEL 3; RUN: llc -mtriple=aarch64-linux-gnu -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,FAST 4 5define i32 @sdiv_i32_exact(i32 %a) { 6; CHECK-LABEL: sdiv_i32_exact: 7; CHECK: // %bb.0: 8; CHECK-NEXT: asr w0, w0, #3 9; CHECK-NEXT: ret 10 %1 = sdiv exact i32 %a, 8 11 ret i32 %1 12} 13 14define i32 @sdiv_i32_pos(i32 %a) { 15; CHECK-LABEL: sdiv_i32_pos: 16; CHECK: // %bb.0: 17; CHECK-NEXT: add w8, w0, #7 // =7 18; CHECK-NEXT: cmp w0, #0 // =0 19; CHECK-NEXT: csel w8, w8, w0, lt 20; CHECK-NEXT: asr w0, w8, #3 21; CHECK-NEXT: ret 22 %1 = sdiv i32 %a, 8 23 ret i32 %1 24} 25 26define i32 @sdiv_i32_neg(i32 %a) { 27; CHECK-LABEL: sdiv_i32_neg: 28; CHECK: // %bb.0: 29; CHECK-NEXT: add w8, w0, #7 // =7 30; CHECK-NEXT: cmp w0, #0 // =0 31; CHECK-NEXT: csel w8, w8, w0, lt 32; CHECK-NEXT: neg w0, w8, asr #3 33; CHECK-NEXT: ret 34 %1 = sdiv i32 %a, -8 35 ret i32 %1 36} 37 38define i64 @sdiv_i64_exact(i64 %a) { 39; CHECK-LABEL: sdiv_i64_exact: 40; CHECK: // %bb.0: 41; CHECK-NEXT: asr x0, x0, #4 42; CHECK-NEXT: ret 43 %1 = sdiv exact i64 %a, 16 44 ret i64 %1 45} 46 47define i64 @sdiv_i64_pos(i64 %a) { 48; CHECK-LABEL: sdiv_i64_pos: 49; CHECK: // %bb.0: 50; CHECK-NEXT: add x8, x0, #15 // =15 51; CHECK-NEXT: cmp x0, #0 // =0 52; CHECK-NEXT: csel x8, x8, x0, lt 53; CHECK-NEXT: asr x0, x8, #4 54; CHECK-NEXT: ret 55 %1 = sdiv i64 %a, 16 56 ret i64 %1 57} 58 59define i64 @sdiv_i64_neg(i64 %a) { 60; CHECK-LABEL: sdiv_i64_neg: 61; CHECK: // %bb.0: 62; CHECK-NEXT: add x8, x0, #15 // =15 63; CHECK-NEXT: cmp x0, #0 // =0 64; CHECK-NEXT: csel x8, x8, x0, lt 65; CHECK-NEXT: neg x0, x8, asr #4 66; CHECK-NEXT: ret 67 %1 = sdiv i64 %a, -16 68 ret i64 %1 69} 70