1; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VCCZ-BUG %s 2; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VCCZ-BUG %s 3; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOVCCZ-BUG %s 4 5; GCN-FUNC: {{^}}vccz_workaround: 6; GCN: s_load_dword s{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], 0x0 7; GCN: v_cmp_neq_f32_e64 {{[^,]*}}, s{{[0-9]+}}, 0{{$}} 8; VCCZ-BUG: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 9; VCCZ-BUG: s_mov_b64 vcc, vcc 10; NOVCCZ-BUG-NOT: s_mov_b64 vcc, vcc 11; GCN: s_cbranch_vccnz [[EXIT:[0-9A-Za-z_]+]] 12; GCN: buffer_store_dword 13; GCN: [[EXIT]]: 14; GCN: s_endpgm 15define amdgpu_kernel void @vccz_workaround(i32 addrspace(4)* %in, i32 addrspace(1)* %out, float %cond) { 16entry: 17 %cnd = fcmp oeq float 0.0, %cond 18 %sgpr = load volatile i32, i32 addrspace(4)* %in 19 br i1 %cnd, label %if, label %endif 20 21if: 22 store i32 %sgpr, i32 addrspace(1)* %out 23 br label %endif 24 25endif: 26 ret void 27} 28 29; GCN-FUNC: {{^}}vccz_noworkaround: 30; GCN: v_cmp_neq_f32_e32 vcc, 0, v{{[0-9]+}} 31; GCN: s_cbranch_vccnz [[EXIT:[0-9A-Za-z_]+]] 32; GCN: buffer_store_dword 33; GCN: [[EXIT]]: 34; GCN: s_endpgm 35define amdgpu_kernel void @vccz_noworkaround(float addrspace(1)* %in, float addrspace(1)* %out) { 36entry: 37 %vgpr = load volatile float, float addrspace(1)* %in 38 %cnd = fcmp oeq float 0.0, %vgpr 39 br i1 %cnd, label %if, label %endif 40 41if: 42 store float %vgpr, float addrspace(1)* %out 43 br label %endif 44 45endif: 46 ret void 47} 48