• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; RUN: llc -march=amdgcn -mcpu=tahiti -o - %s | FileCheck %s
2; Don't crash when the use of an undefined value is only detected by the
3; register coalescer because it is hidden with subregister insert/extract.
4target triple="amdgcn--"
5
6; CHECK-LABEL: foobar:
7; CHECK: s_load_dwordx2 s[2:3], s[0:1], 0x9
8; CHECK-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
9; CHECK-NEXT: v_mbcnt_lo_u32_b32_e64
10; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
11; CHECK-NEXT: s_waitcnt lgkmcnt(0)
12; CHECK-NEXT: v_mov_b32_e32 v1, s3
13; CHECK-NEXT: s_and_saveexec_b64 s[2:3], vcc
14
15; CHECK: BB0_1:
16; CHECK-NEXT: ; kill: def $vgpr0_vgpr1 killed $sgpr2_sgpr3 killed $exec
17; CHECK-NEXT: ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3
18
19; CHECK: BB0_2:
20; CHECK: s_or_b64 exec, exec, s[2:3]
21; CHECK-NEXT: s_mov_b32 s3, 0xf000
22; CHECK-NEXT: s_mov_b32 s2, -1
23; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], 0
24; CHECK-NEXT: s_endpgm
25define amdgpu_kernel void @foobar(float %a0, float %a1, float addrspace(1)* %out) nounwind {
26entry:
27  %v0 = insertelement <4 x float> undef, float %a0, i32 0
28  %tid = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0
29  %cnd = icmp eq i32 %tid, 0
30  br i1 %cnd, label %ift, label %ife
31
32ift:
33  %v1 = insertelement <4 x float> undef, float %a1, i32 0
34  br label %ife
35
36ife:
37  %val = phi <4 x float> [ %v1, %ift ], [ %v0, %entry ]
38  %v2 = extractelement <4 x float> %val, i32 1
39  store float %v2, float addrspace(1)* %out, align 4
40  ret void
41}
42
43declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0
44
45attributes #0 = { nounwind readnone }
46