1; RUN: llc -march=hexagon -mcpu=hexagonv60 < %s 2; REQUIRES: asserts 3 4; Test that the pipeliner reuses an existing Phi when generating the epilog 5; block. In this case, the original loops has a Phi whose operand is another 6; Phi. When the loop is pipelined, the Phi that generates the operand value 7; is used in two stages. This means the Phi for the second stage can 8; be reused. The bug causes an assert due to an invalid virtual register error 9; in the live variable analysis. 10 11define void @test(i8* %a, i8* %b) #0 { 12entry: 13 br label %for.body6.us.prol 14 15for.body6.us.prol: 16 %i.065.us.prol = phi i32 [ 0, %entry ], [ %inc.us.prol, %for.body6.us.prol ] 17 %im1.064.us.prol = phi i32 [ undef, %entry ], [ %i.065.us.prol, %for.body6.us.prol ] 18 %prol.iter = phi i32 [ undef, %entry ], [ %prol.iter.sub, %for.body6.us.prol ] 19 %arrayidx8.us.prol = getelementptr inbounds i8, i8* %b, i32 %im1.064.us.prol 20 %0 = load i8, i8* %arrayidx8.us.prol, align 1 21 %conv9.us.prol = sext i8 %0 to i32 22 %add.us.prol = add nsw i32 %conv9.us.prol, 0 23 %add12.us.prol = add nsw i32 %add.us.prol, 0 24 %mul.us.prol = mul nsw i32 %add12.us.prol, 3 25 %conv13.us.prol = trunc i32 %mul.us.prol to i8 26 %arrayidx14.us.prol = getelementptr inbounds i8, i8* %a, i32 %i.065.us.prol 27 store i8 %conv13.us.prol, i8* %arrayidx14.us.prol, align 1 28 %inc.us.prol = add nuw nsw i32 %i.065.us.prol, 1 29 %prol.iter.sub = add i32 %prol.iter, -1 30 %prol.iter.cmp = icmp eq i32 %prol.iter.sub, 0 31 br i1 %prol.iter.cmp, label %for.body6.us, label %for.body6.us.prol 32 33for.body6.us: 34 %im2.063.us = phi i32 [ undef, %for.body6.us ], [ %im1.064.us.prol, %for.body6.us.prol ] 35 %arrayidx10.us = getelementptr inbounds i8, i8* %b, i32 %im2.063.us 36 %1 = load i8, i8* %arrayidx10.us, align 1 37 %conv11.us = sext i8 %1 to i32 38 %add12.us = add nsw i32 0, %conv11.us 39 %mul.us = mul nsw i32 %add12.us, 3 40 %conv13.us = trunc i32 %mul.us to i8 41 store i8 %conv13.us, i8* undef, align 1 42 br label %for.body6.us 43} 44 45