1; RUN: not llc -march=mipsel -mcpu=mips32r2 -mattr=+fp64 \ 2; RUN: -O0 -relocation-model=pic -fast-isel-abort=3 < %s 3 4; Check that FastISel aborts when we have 64bit FPU registers. FastISel currently 5; supports AFGR64 only, which uses paired 32 bit registers. 6 7define zeroext i1 @f(double %value) { 8entry: 9; CHECK-LABEL: f: 10; CHECK: sdc1 11 %value.addr = alloca double, align 8 12 store double %value, double* %value.addr, align 8 13 ret i1 false 14} 15