1; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \ 2; RUN: < %s | FileCheck %s 3 4@i = global i32 75, align 4 5@s = global i16 -345, align 2 6@c = global i8 118, align 1 7@f = global float 0x40BE623360000000, align 4 8@d = global double 1.298330e+03, align 8 9 10; Function Attrs: nounwind 11define i32 @reti() { 12entry: 13; CHECK-LABEL: reti: 14 %0 = load i32, i32* @i, align 4 15 ret i32 %0 16; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 17; CHECK: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 18; CHECK: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 19; CHECK: lw $[[REG_I_ADDR:[0-9]+]], %got(i)($[[REG_GP]]) 20; CHECK: lw $2, 0($[[REG_I_ADDR]]) 21; CHECK: jr $ra 22} 23 24; Function Attrs: nounwind 25define i16 @retus() { 26entry: 27; CHECK-LABEL: retus: 28 %0 = load i16, i16* @s, align 2 29 ret i16 %0 30; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 31; CHECK: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 32; CHECK: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 33; CHECK: lw $[[REG_S_ADDR:[0-9]+]], %got(s)($[[REG_GP]]) 34; CHECK: lhu $2, 0($[[REG_S_ADDR]]) 35; CHECK: jr $ra 36} 37 38; Function Attrs: nounwind 39define signext i16 @rets() { 40entry: 41; CHECK-LABEL: rets: 42 %0 = load i16, i16* @s, align 2 43 ret i16 %0 44; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 45; CHECK: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 46; CHECK: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 47; CHECK: lw $[[REG_S_ADDR:[0-9]+]], %got(s)($[[REG_GP]]) 48; CHECK: lhu $[[REG_S:[0-9]+]], 0($[[REG_S_ADDR]]) 49; CHECK: seh $2, $[[REG_S]] 50; CHECK: jr $ra 51} 52 53; Function Attrs: nounwind 54define i8 @retuc() { 55entry: 56; CHECK-LABEL: retuc: 57 %0 = load i8, i8* @c, align 1 58 ret i8 %0 59; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 60; CHECK: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 61; CHECK: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 62; CHECK: lw $[[REG_C_ADDR:[0-9]+]], %got(c)($[[REG_GP]]) 63; CHECK: lbu $2, 0($[[REG_C_ADDR]]) 64; CHECK: jr $ra 65} 66 67; Function Attrs: nounwind 68define signext i8 @retc() { 69entry: 70; CHECK-LABEL: retc: 71 %0 = load i8, i8* @c, align 1 72 ret i8 %0 73; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 74; CHECK: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 75; CHECK: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 76; CHECK: lw $[[REG_C_ADDR:[0-9]+]], %got(c)($[[REG_GP]]) 77; CHECK: lbu $[[REG_C:[0-9]+]], 0($[[REG_C_ADDR]]) 78; CHECK: seb $2, $[[REG_C]] 79; CHECK: jr $ra 80} 81 82; Function Attrs: nounwind 83define float @retf() { 84entry: 85; CHECK-LABEL: retf: 86 %0 = load float, float* @f, align 4 87 ret float %0 88; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 89; CHECK: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 90; CHECK: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 91; CHECK: lw $[[REG_F_ADDR:[0-9]+]], %got(f)($[[REG_GP]]) 92; CHECK: lwc1 $f0, 0($[[REG_F_ADDR]]) 93; CHECK: jr $ra 94} 95 96; Function Attrs: nounwind 97define double @retd() { 98entry: 99; CHECK-LABEL: retd: 100 %0 = load double, double* @d, align 8 101 ret double %0 102; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp) 103; CHECK: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp) 104; CHECK: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25 105; CHECK: lw $[[REG_D_ADDR:[0-9]+]], %got(d)($[[REG_GP]]) 106; CHECK: ldc1 $f0, 0($[[REG_D_ADDR]]) 107; CHECK: jr $ra 108} 109