• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1; RUN: llc < %s -march=mips64   -target-abi n64 -mcpu=mips64r2 | FileCheck %s -check-prefixes=ALL,MIPSEB
2; RUN: llc < %s -march=mips64el -target-abi n64 -mcpu=mips64r2 | FileCheck %s -check-prefixes=ALL,MIPSEL
3; RUN: llc < %s -march=mips64   -target-abi n32 -mcpu=mips64r2 | FileCheck %s -check-prefixes=ALL,MIPSEB
4; RUN: llc < %s -march=mips64el -target-abi n32 -mcpu=mips64r2 | FileCheck %s -check-prefixes=ALL,MIPSEL
5
6; #include <stdio.h>
7;
8; struct S1 {
9;   char x1;
10;   short x2;
11;   char x3;
12; };
13;
14; struct S2 {
15;   char x1;
16;   char x2;
17;   char x3;
18;   char x4;
19;   char x5;
20; };
21;
22; void fS1(struct S1 s);
23; void fS2(struct S2 s);
24;
25; void f1() {
26;   struct S1 s1_1;
27;   fS1(s1_1);
28; }
29;
30; void f2() {
31;   struct S2 s2_1;
32;   fS2(s2_1);
33; }
34;
35; int main() {
36;   f1();
37;   f2();
38; }
39
40%struct.S1 = type { i8, i16, i8 }
41%struct.S2 = type { i8, i8, i8, i8, i8 }
42
43declare void @fS1(i48 inreg) #1
44declare void @fS2(i40 inreg) #1
45
46declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) #2
47
48define void @f1() #0 {
49entry:
50  %s1_1 = alloca %struct.S1, align 2
51  %s1_1.coerce = alloca { i48 }
52  %0 = bitcast { i48 }* %s1_1.coerce to i8*
53  %1 = bitcast %struct.S1* %s1_1 to i8*
54  call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 6, i1 false)
55  %2 = getelementptr { i48 }, { i48 }* %s1_1.coerce, i32 0, i32 0
56  %3 = load i48, i48* %2, align 1
57  call void @fS1(i48 inreg %3)
58  ret void
59 ; ALL-LABEL: f1:
60
61 ; MIPSEB:       dsll $[[R1:[0-9]+]], $[[R2:[0-9]+]], 16
62 ; MIPSEL-NOT:   dsll $[[R1:[0-9]+]], $[[R2:[0-9]+]], 16
63}
64
65define void @f2() #0 {
66entry:
67  %s2_1 = alloca %struct.S2, align 1
68  %s2_1.coerce = alloca { i40 }
69  %0 = bitcast { i40 }* %s2_1.coerce to i8*
70  %1 = bitcast %struct.S2* %s2_1 to i8*
71  call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 5, i1 false)
72  %2 = getelementptr { i40 }, { i40 }* %s2_1.coerce, i32 0, i32 0
73  %3 = load i40, i40* %2, align 1
74  call void @fS2(i40 inreg %3)
75  ret void
76 ; ALL-LABEL: f2:
77
78 ; MIPSEB:       dsll $[[R1:[0-9]+]], $[[R2:[0-9]+]], 24
79 ; MIPSEL-NOT:   dsll $[[R1:[0-9]+]], $[[R2:[0-9]+]], 24
80}
81