1; RUN: llc -march=mips -mcpu=mips32 -asm-show-inst < %s | FileCheck %s --check-prefix=MIPS32 2; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 -asm-show-inst < %s | FileCheck %s --check-prefix=MIPS32FP64 3; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+micromips -asm-show-inst < %s | FileCheck %s --check-prefix=MM 4; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+micromips,+fp64 -asm-show-inst < %s | FileCheck %s --check-prefix=MMFP64 5; RUN: llc -march=mips -mcpu=mips32r6 -mattr=+micromips -asm-show-inst < %s | FileCheck %s --check-prefix=MMR6 6 7define float @abs_s(float %a) { 8; MIPS32: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S 9; MIPS32FP64: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S 10; MM: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S_MM 11; MMFP64: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S_MM 12; MMR6: abs.s {{.*}} # <MCInst #{{[0-9]+}} FABS_S_MM 13 %ret = call float @llvm.fabs.f32(float %a) 14 ret float %ret 15} 16 17define double @abs_d(double %a) { 18; MIPS32: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D32 19; MIPS32FP64: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D64 20; MM: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D32_MM 21; MMFP64: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D64_MM 22; MMR6: abs.d {{.*}} # <MCInst #{{[0-9]+}} FABS_D64_MM 23 %ret = call double @llvm.fabs.f64(double %a) 24 ret double %ret 25} 26 27declare float @llvm.fabs.f32(float %a) 28declare double @llvm.fabs.f64(double %a) 29