1; RUN: llc -march=mips -mcpu=mips32r2 -asm-show-inst \ 2; RUN: -mno-ldc1-sdc1 < %s | FileCheck %s --check-prefix=MIPS32R2 3; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+fp64 -asm-show-inst \ 4; RUN: -mno-ldc1-sdc1 < %s | FileCheck %s --check-prefix=MIPS32FP64 5; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+micromips -asm-show-inst \ 6; RUN: -mno-ldc1-sdc1 < %s | FileCheck %s --check-prefix=MM 7; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+micromips,+fp64 -asm-show-inst \ 8; RUN: -mno-ldc1-sdc1 < %s | FileCheck %s --check-prefix=MMFP64 9; RUN: llc -march=mips -mcpu=mips32r6 -mattr=+micromips -asm-show-inst \ 10; RUN: -mno-ldc1-sdc1 < %s | FileCheck %s --check-prefix=MMR6 11 12define double @mthc1(i64 %a) { 13; MIPS32R2: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D32 14; MIPS32FP64: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D64 15; MM: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D32_MM 16; MMFP64: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D64_MM 17; MMR6: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D64_MM 18 %1 = bitcast i64 %a to double 19 ret double %1 20} 21 22define i64 @mfhc1(double %a) { 23; MIPS32R2: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D32 24; MIPS32FP64: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D64 25; MM: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D32_MM 26; MMFP64: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D64_MM 27; MMR6: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D64_MM 28 %1 = bitcast double %a to i64 29 ret i64 %1 30} 31