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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2;       Except for the NACL version which isn't parsed by update_llc_test_checks.py
3; RUN: llc -mtriple=mipsel-unknown-linux-gnu -O3 -relocation-model=pic < %s \
4; RUN:   | FileCheck %s -check-prefix=NOLONGBRANCH
5
6; RUN: llc -mtriple=mipsel-unknown-linux-gnu -force-mips-long-branch -O3 -relocation-model=pic < %s \
7; RUN:   | FileCheck %s -check-prefix=O32-PIC
8; RUN: llc -mtriple=mipsel-unknown-linux-gnu -force-mips-long-branch -O3 -relocation-model=static < %s \
9; RUN:   | FileCheck %s -check-prefix=O32-STATIC
10; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r6 -force-mips-long-branch -O3 \
11; RUN:   -relocation-model=pic < %s | FileCheck %s -check-prefix=O32-R6-PIC
12
13; RUN: llc -mtriple=mips64el-unknown-linux-gnu -mcpu=mips4 -target-abi=n64 -force-mips-long-branch -O3 -relocation-model=pic \
14; RUN:   < %s | FileCheck %s -check-prefix=MIPS4
15; RUN: llc -mtriple=mips64el-unknown-linux-gnu -mcpu=mips64 -target-abi=n64 -force-mips-long-branch -O3 -relocation-model=pic \
16; RUN:   < %s | FileCheck %s -check-prefix=MIPS64
17; RUN: llc -mtriple=mips64el-unknown-linux-gnu -mcpu=mips64r6 -target-abi=n64 -force-mips-long-branch -O3 \
18; RUN:   -relocation-model=pic < %s | FileCheck %s -check-prefix=N64-R6
19
20; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r2 -mattr=micromips \
21; RUN:   -force-mips-long-branch -O3 -relocation-model=pic < %s | FileCheck %s -check-prefix=MICROMIPS
22; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r2 -mattr=micromips \
23; RUN:   -force-mips-long-branch -O3 -relocation-model=static < %s | FileCheck %s -check-prefix=MICROMIPSSTATIC
24
25; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r6 -mattr=micromips \
26; RUN:   -force-mips-long-branch -O3 -relocation-model=static < %s | FileCheck %s -check-prefix=MICROMIPSR6STATIC
27; RUN: llc -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r6 -mattr=micromips \
28; RUN:   -force-mips-long-branch -O3 -relocation-model=pic < %s | FileCheck %s -check-prefix=MICROMIPSR6PIC
29
30
31; RUN: llc -mtriple=mipsel-none-nacl -force-mips-long-branch -O3 -relocation-model=pic < %s \
32; RUN:   | FileCheck %s -check-prefix=NACL
33
34
35@x = external global i32
36
37define void @test1(i32 signext %s) {
38; NOLONGBRANCH-LABEL: test1:
39; NOLONGBRANCH:       # %bb.0: # %entry
40; NOLONGBRANCH-NEXT:    lui $2, %hi(_gp_disp)
41; NOLONGBRANCH-NEXT:    addiu $2, $2, %lo(_gp_disp)
42; NOLONGBRANCH-NEXT:    beqz $4, $BB0_2
43; NOLONGBRANCH-NEXT:    addu $2, $2, $25
44; NOLONGBRANCH-NEXT:  # %bb.1: # %then
45; NOLONGBRANCH-NEXT:    lw $1, %got(x)($2)
46; NOLONGBRANCH-NEXT:    addiu $2, $zero, 1
47; NOLONGBRANCH-NEXT:    sw $2, 0($1)
48; NOLONGBRANCH-NEXT:  $BB0_2: # %end
49; NOLONGBRANCH-NEXT:    jr $ra
50; NOLONGBRANCH-NEXT:    nop
51;
52; O32-PIC-LABEL: test1:
53; O32-PIC:       # %bb.0: # %entry
54; O32-PIC-NEXT:    lui $2, %hi(_gp_disp)
55; O32-PIC-NEXT:    addiu $2, $2, %lo(_gp_disp)
56; O32-PIC-NEXT:    bnez $4, $BB0_3
57; O32-PIC-NEXT:    addu $2, $2, $25
58; O32-PIC-NEXT:  # %bb.1: # %entry
59; O32-PIC-NEXT:    addiu $sp, $sp, -8
60; O32-PIC-NEXT:    sw $ra, 0($sp)
61; O32-PIC-NEXT:    lui $1, %hi(($BB0_4)-($BB0_2))
62; O32-PIC-NEXT:    bal $BB0_2
63; O32-PIC-NEXT:    addiu $1, $1, %lo(($BB0_4)-($BB0_2))
64; O32-PIC-NEXT:  $BB0_2: # %entry
65; O32-PIC-NEXT:    addu $1, $ra, $1
66; O32-PIC-NEXT:    lw $ra, 0($sp)
67; O32-PIC-NEXT:    jr $1
68; O32-PIC-NEXT:    addiu $sp, $sp, 8
69; O32-PIC-NEXT:  $BB0_3: # %then
70; O32-PIC-NEXT:    lw $1, %got(x)($2)
71; O32-PIC-NEXT:    addiu $2, $zero, 1
72; O32-PIC-NEXT:    sw $2, 0($1)
73; O32-PIC-NEXT:  $BB0_4: # %end
74; O32-PIC-NEXT:    jr $ra
75; O32-PIC-NEXT:    nop
76;
77; O32-STATIC-LABEL: test1:
78; O32-STATIC:       # %bb.0: # %entry
79; O32-STATIC-NEXT:    bnez $4, $BB0_2
80; O32-STATIC-NEXT:    nop
81; O32-STATIC-NEXT:  # %bb.1: # %entry
82; O32-STATIC-NEXT:    j $BB0_3
83; O32-STATIC-NEXT:    nop
84; O32-STATIC-NEXT:  $BB0_2: # %then
85; O32-STATIC-NEXT:    lui $1, %hi(x)
86; O32-STATIC-NEXT:    addiu $2, $zero, 1
87; O32-STATIC-NEXT:    sw $2, %lo(x)($1)
88; O32-STATIC-NEXT:  $BB0_3: # %end
89; O32-STATIC-NEXT:    jr $ra
90; O32-STATIC-NEXT:    nop
91;
92; O32-R6-PIC-LABEL: test1:
93; O32-R6-PIC:       # %bb.0: # %entry
94; O32-R6-PIC-NEXT:    lui $2, %hi(_gp_disp)
95; O32-R6-PIC-NEXT:    addiu $2, $2, %lo(_gp_disp)
96; O32-R6-PIC-NEXT:    bnez $4, $BB0_3
97; O32-R6-PIC-NEXT:    addu $2, $2, $25
98; O32-R6-PIC-NEXT:  # %bb.1: # %entry
99; O32-R6-PIC-NEXT:    addiu $sp, $sp, -8
100; O32-R6-PIC-NEXT:    sw $ra, 0($sp)
101; O32-R6-PIC-NEXT:    lui $1, %hi(($BB0_4)-($BB0_2))
102; O32-R6-PIC-NEXT:    addiu $1, $1, %lo(($BB0_4)-($BB0_2))
103; O32-R6-PIC-NEXT:    balc $BB0_2
104; O32-R6-PIC-NEXT:  $BB0_2: # %entry
105; O32-R6-PIC-NEXT:    addu $1, $ra, $1
106; O32-R6-PIC-NEXT:    lw $ra, 0($sp)
107; O32-R6-PIC-NEXT:    addiu $sp, $sp, 8
108; O32-R6-PIC-NEXT:    jrc $1
109; O32-R6-PIC-NEXT:  $BB0_3: # %then
110; O32-R6-PIC-NEXT:    lw $1, %got(x)($2)
111; O32-R6-PIC-NEXT:    addiu $2, $zero, 1
112; O32-R6-PIC-NEXT:    sw $2, 0($1)
113; O32-R6-PIC-NEXT:  $BB0_4: # %end
114; O32-R6-PIC-NEXT:    jrc $ra
115;
116; O32-R6-STATIC-LABEL: test1:
117; O32-R6-STATIC:       # %bb.0: # %entry
118; O32-R6-STATIC-NEXT:    bnezc $4, $BB0_2
119; O32-R6-STATIC-NEXT:    nop
120; O32-R6-STATIC-NEXT:  # %bb.1: # %entry
121; O32-R6-STATIC-NEXT:    bc $BB0_3
122; O32-R6-STATIC-NEXT:  $BB0_2: # %then
123; O32-R6-STATIC-NEXT:    lui $1, %hi(x)
124; O32-R6-STATIC-NEXT:    addiu $2, $zero, 1
125; O32-R6-STATIC-NEXT:    sw $2, %lo(x)($1)
126; O32-R6-STATIC-NEXT:  $BB0_3: # %end
127; O32-R6-STATIC-NEXT:    jrc $ra
128;
129; MIPS4-LABEL: test1:
130; MIPS4:       # %bb.0: # %entry
131; MIPS4-NEXT:    lui $1, %hi(%neg(%gp_rel(test1)))
132; MIPS4-NEXT:    bnez $4, .LBB0_3
133; MIPS4-NEXT:    daddu $2, $1, $25
134; MIPS4-NEXT:  # %bb.1: # %entry
135; MIPS4-NEXT:    daddiu $sp, $sp, -16
136; MIPS4-NEXT:    sd $ra, 0($sp)
137; MIPS4-NEXT:    daddiu $1, $zero, %hi(.LBB0_4-.LBB0_2)
138; MIPS4-NEXT:    dsll $1, $1, 16
139; MIPS4-NEXT:    bal .LBB0_2
140; MIPS4-NEXT:    daddiu $1, $1, %lo(.LBB0_4-.LBB0_2)
141; MIPS4-NEXT:  .LBB0_2: # %entry
142; MIPS4-NEXT:    daddu $1, $ra, $1
143; MIPS4-NEXT:    ld $ra, 0($sp)
144; MIPS4-NEXT:    jr $1
145; MIPS4-NEXT:    daddiu $sp, $sp, 16
146; MIPS4-NEXT:  .LBB0_3: # %then
147; MIPS4-NEXT:    daddiu $1, $2, %lo(%neg(%gp_rel(test1)))
148; MIPS4-NEXT:    addiu $2, $zero, 1
149; MIPS4-NEXT:    ld $1, %got_disp(x)($1)
150; MIPS4-NEXT:    sw $2, 0($1)
151; MIPS4-NEXT:  .LBB0_4: # %end
152; MIPS4-NEXT:    jr $ra
153; MIPS4-NEXT:    nop
154;
155; MIPS64-LABEL: test1:
156; MIPS64:       # %bb.0: # %entry
157; MIPS64-NEXT:    lui $1, %hi(%neg(%gp_rel(test1)))
158; MIPS64-NEXT:    bnez $4, .LBB0_3
159; MIPS64-NEXT:    daddu $2, $1, $25
160; MIPS64-NEXT:  # %bb.1: # %entry
161; MIPS64-NEXT:    daddiu $sp, $sp, -16
162; MIPS64-NEXT:    sd $ra, 0($sp)
163; MIPS64-NEXT:    daddiu $1, $zero, %hi(.LBB0_4-.LBB0_2)
164; MIPS64-NEXT:    dsll $1, $1, 16
165; MIPS64-NEXT:    bal .LBB0_2
166; MIPS64-NEXT:    daddiu $1, $1, %lo(.LBB0_4-.LBB0_2)
167; MIPS64-NEXT:  .LBB0_2: # %entry
168; MIPS64-NEXT:    daddu $1, $ra, $1
169; MIPS64-NEXT:    ld $ra, 0($sp)
170; MIPS64-NEXT:    jr $1
171; MIPS64-NEXT:    daddiu $sp, $sp, 16
172; MIPS64-NEXT:  .LBB0_3: # %then
173; MIPS64-NEXT:    daddiu $1, $2, %lo(%neg(%gp_rel(test1)))
174; MIPS64-NEXT:    addiu $2, $zero, 1
175; MIPS64-NEXT:    ld $1, %got_disp(x)($1)
176; MIPS64-NEXT:    sw $2, 0($1)
177; MIPS64-NEXT:  .LBB0_4: # %end
178; MIPS64-NEXT:    jr $ra
179; MIPS64-NEXT:    nop
180;
181; N64-R6-LABEL: test1:
182; N64-R6:       # %bb.0: # %entry
183; N64-R6-NEXT:    lui $1, %hi(%neg(%gp_rel(test1)))
184; N64-R6-NEXT:    bnez $4, .LBB0_3
185; N64-R6-NEXT:    daddu $2, $1, $25
186; N64-R6-NEXT:  # %bb.1: # %entry
187; N64-R6-NEXT:    daddiu $sp, $sp, -16
188; N64-R6-NEXT:    sd $ra, 0($sp)
189; N64-R6-NEXT:    daddiu $1, $zero, %hi(.LBB0_4-.LBB0_2)
190; N64-R6-NEXT:    dsll $1, $1, 16
191; N64-R6-NEXT:    daddiu $1, $1, %lo(.LBB0_4-.LBB0_2)
192; N64-R6-NEXT:    balc .LBB0_2
193; N64-R6-NEXT:  .LBB0_2: # %entry
194; N64-R6-NEXT:    daddu $1, $ra, $1
195; N64-R6-NEXT:    ld $ra, 0($sp)
196; N64-R6-NEXT:    daddiu $sp, $sp, 16
197; N64-R6-NEXT:    jrc $1
198; N64-R6-NEXT:  .LBB0_3: # %then
199; N64-R6-NEXT:    daddiu $1, $2, %lo(%neg(%gp_rel(test1)))
200; N64-R6-NEXT:    addiu $2, $zero, 1
201; N64-R6-NEXT:    ld $1, %got_disp(x)($1)
202; N64-R6-NEXT:    sw $2, 0($1)
203; N64-R6-NEXT:  .LBB0_4: # %end
204; N64-R6-NEXT:    jrc $ra
205;
206; MICROMIPS-LABEL: test1:
207; MICROMIPS:       # %bb.0: # %entry
208; MICROMIPS-NEXT:    lui $2, %hi(_gp_disp)
209; MICROMIPS-NEXT:    addiu $2, $2, %lo(_gp_disp)
210; MICROMIPS-NEXT:    bnez $4, $BB0_3
211; MICROMIPS-NEXT:    addu $2, $2, $25
212; MICROMIPS-NEXT:  # %bb.1: # %entry
213; MICROMIPS-NEXT:    addiu $sp, $sp, -8
214; MICROMIPS-NEXT:    sw $ra, 0($sp)
215; MICROMIPS-NEXT:    lui $1, %hi(($BB0_4)-($BB0_2))
216; MICROMIPS-NEXT:    bal $BB0_2
217; MICROMIPS-NEXT:    addiu $1, $1, %lo(($BB0_4)-($BB0_2))
218; MICROMIPS-NEXT:  $BB0_2: # %entry
219; MICROMIPS-NEXT:    addu $1, $ra, $1
220; MICROMIPS-NEXT:    lw $ra, 0($sp)
221; MICROMIPS-NEXT:    jr $1
222; MICROMIPS-NEXT:    addiu $sp, $sp, 8
223; MICROMIPS-NEXT:  $BB0_3: # %then
224; MICROMIPS-NEXT:    lw $2, %got(x)($2)
225; MICROMIPS-NEXT:    li16 $3, 1
226; MICROMIPS-NEXT:    sw16 $3, 0($2)
227; MICROMIPS-NEXT:  $BB0_4: # %end
228; MICROMIPS-NEXT:    jrc $ra
229;
230; MICROMIPSSTATIC-LABEL: test1:
231; MICROMIPSSTATIC:       # %bb.0: # %entry
232; MICROMIPSSTATIC-NEXT:    bnezc $4, $BB0_2
233; MICROMIPSSTATIC-NEXT:  # %bb.1: # %entry
234; MICROMIPSSTATIC-NEXT:    j $BB0_3
235; MICROMIPSSTATIC-NEXT:    nop
236; MICROMIPSSTATIC-NEXT:  $BB0_2: # %then
237; MICROMIPSSTATIC-NEXT:    lui $1, %hi(x)
238; MICROMIPSSTATIC-NEXT:    li16 $2, 1
239; MICROMIPSSTATIC-NEXT:    sw $2, %lo(x)($1)
240; MICROMIPSSTATIC-NEXT:  $BB0_3: # %end
241; MICROMIPSSTATIC-NEXT:    jrc $ra
242;
243; MICROMIPSR6STATIC-LABEL: test1:
244; MICROMIPSR6STATIC:       # %bb.0: # %entry
245; MICROMIPSR6STATIC-NEXT:    bnezc $4, $BB0_2
246; MICROMIPSR6STATIC-NEXT:  # %bb.1: # %entry
247; MICROMIPSR6STATIC-NEXT:    bc $BB0_3
248; MICROMIPSR6STATIC-NEXT:  $BB0_2: # %then
249; MICROMIPSR6STATIC-NEXT:    lui $1, %hi(x)
250; MICROMIPSR6STATIC-NEXT:    li16 $2, 1
251; MICROMIPSR6STATIC-NEXT:    sw $2, %lo(x)($1)
252; MICROMIPSR6STATIC-NEXT:  $BB0_3: # %end
253; MICROMIPSR6STATIC-NEXT:    jrc $ra
254;
255; MICROMIPSR6PIC-LABEL: test1:
256; MICROMIPSR6PIC:       # %bb.0: # %entry
257; MICROMIPSR6PIC-NEXT:    lui $2, %hi(_gp_disp)
258; MICROMIPSR6PIC-NEXT:    addiu $2, $2, %lo(_gp_disp)
259; MICROMIPSR6PIC-NEXT:    addu $2, $2, $25
260; MICROMIPSR6PIC-NEXT:    bnezc $4, $BB0_3
261; MICROMIPSR6PIC-NEXT:  # %bb.1: # %entry
262; MICROMIPSR6PIC-NEXT:    addiu $sp, $sp, -8
263; MICROMIPSR6PIC-NEXT:    sw $ra, 0($sp)
264; MICROMIPSR6PIC-NEXT:    lui $1, %hi(($BB0_4)-($BB0_2))
265; MICROMIPSR6PIC-NEXT:    addiu $1, $1, %lo(($BB0_4)-($BB0_2))
266; MICROMIPSR6PIC-NEXT:    balc $BB0_2
267; MICROMIPSR6PIC-NEXT:  $BB0_2: # %entry
268; MICROMIPSR6PIC-NEXT:    addu $1, $ra, $1
269; MICROMIPSR6PIC-NEXT:    lw $ra, 0($sp)
270; MICROMIPSR6PIC-NEXT:    addiu $sp, $sp, 8
271; MICROMIPSR6PIC-NEXT:    jic $1, 0
272; MICROMIPSR6PIC-NEXT:  $BB0_3: # %then
273; MICROMIPSR6PIC-NEXT:    lw $2, %got(x)($2)
274; MICROMIPSR6PIC-NEXT:    li16 $3, 1
275; MICROMIPSR6PIC-NEXT:    sw16 $3, 0($2)
276; MICROMIPSR6PIC-NEXT:  $BB0_4: # %end
277; MICROMIPSR6PIC-NEXT:    jrc $ra
278
279; NACL-LABEL: test1:
280; NACL:       # %bb.0:
281; NACL-NEXT:    lui $2, %hi(_gp_disp)
282; NACL-NEXT:    addiu $2, $2, %lo(_gp_disp)
283; NACL-NEXT:    bnez  $4, $BB0_3
284; NACL-NEXT:    addu  $2, $2, $25
285; NACL-NEXT:  # %bb.1:
286; NACL-NEXT:    addiu $sp, $sp, -8
287; NACL-NEXT:    sw  $ra, 0($sp)
288; NACL-NEXT:    lui $1, %hi(($BB0_4)-($BB0_2))
289; NACL-NEXT:    bal $BB0_2
290; NACL-NEXT:    addiu $1, $1, %lo(($BB0_4)-($BB0_2))
291; NACL-NEXT:  $BB0_2:
292; NACL-NEXT:    addu  $1, $ra, $1
293; NACL-NEXT:    lw  $ra, 0($sp)
294; NACL-NEXT:    addiu $sp, $sp, 8
295; NACL-NEXT:    jr  $1
296; NACL-NEXT:    nop
297; NACL-NEXT:  $BB0_3:
298; NACL-NEXT:    lw  $1, %got(x)($2)
299; NACL-NEXT:    addiu $2, $zero, 1
300; NACL-NEXT:    sw  $2, 0($1)
301; NACL-NEXT:    .p2align  4
302; NACL-NEXT:  $BB0_4:
303; NACL-NEXT:    jr  $ra
304; NACL-NEXT:    nop
305
306
307; Check the NaCl version.  Check that sp change is not in the branch delay slot
308; of "jr $1" instruction.  Check that target of indirect branch "jr $1" is
309; bundle aligned.
310
311entry:
312  %cmp = icmp eq i32 %s, 0
313  br i1 %cmp, label %end, label %then
314
315then:
316  store i32 1, i32* @x, align 4
317  br label %end
318
319end:
320  ret void
321
322}
323