1# RUN: llc -O0 -march=mips -mcpu=mips32r3 -mattr=+micromips,+eva -start-after=expand-isel-pseudos \ 2# RUN: -filetype obj %s -o - | llvm-objdump -mattr=+eva -d - | FileCheck %s 3 4--- | 5 6 @wArray = global [13 x i32] zeroinitializer, align 4 7 @hArray = global [13 x i16] zeroinitializer, align 2 8 @bArray = global [13 x i8] zeroinitializer, align 1 9 10 ; Function Attrs: noinline nounwind optnone 11 define void @_Z3foov() { 12 entry: 13 %0 = load i8, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @bArray, i32 0, i32 5), align 1 14 %conv = sext i8 %0 to i32 15 %sub = sub nsw i32 %conv, 7 16 %conv1 = trunc i32 %sub to i8 17 store i8 %conv1, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @bArray, i32 0, i32 3), align 1 18 %1 = load i8, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @bArray, i32 0, i32 5), align 1 19 %conv2 = sext i8 %1 to i32 20 %sub3 = sub nsw i32 %conv2, 7 21 %conv4 = trunc i32 %sub3 to i8 22 store i8 %conv4, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @bArray, i32 0, i32 3), align 1 23 %2 = load i16, i16* getelementptr inbounds ([13 x i16], [13 x i16]* @hArray, i32 0, i32 5), align 2 24 %conv5 = sext i16 %2 to i32 25 %sub6 = sub nsw i32 %conv5, 7 26 %conv7 = trunc i32 %sub6 to i16 27 store i16 %conv7, i16* getelementptr inbounds ([13 x i16], [13 x i16]* @hArray, i32 0, i32 3), align 2 28 %3 = load i16, i16* getelementptr inbounds ([13 x i16], [13 x i16]* @hArray, i32 0, i32 5), align 2 29 %conv8 = sext i16 %3 to i32 30 %sub9 = sub nsw i32 %conv8, 7 31 %conv10 = trunc i32 %sub9 to i16 32 store i16 %conv10, i16* getelementptr inbounds ([13 x i16], [13 x i16]* @hArray, i32 0, i32 3), align 2 33 %4 = load i32, i32* getelementptr inbounds ([13 x i32], [13 x i32]* @wArray, i32 0, i32 5), align 4 34 %sub11 = sub nsw i32 %4, 7 35 store i32 %sub11, i32* getelementptr inbounds ([13 x i32], [13 x i32]* @wArray, i32 0, i32 3), align 4 36 ret void 37 } 38 39 ; Function Attrs: noinline nounwind optnone 40 define i32 @_Z3barPi(i32* %z) { 41 entry: 42 %z.addr = alloca i32*, align 4 43 store i32* %z, i32** %z.addr, align 4 44 %0 = load i32*, i32** %z.addr, align 4 45 fence seq_cst 46 %1 = atomicrmw add i32* %0, i32 42 monotonic 47 fence seq_cst 48 %2 = add i32 %1, 42 49 ret i32 %2 50 } 51 52... 53--- 54name: _Z3foov 55alignment: 2 56exposesReturnsTwice: false 57legalized: false 58regBankSelected: false 59selected: false 60tracksRegLiveness: true 61registers: 62 - { id: 0, class: gpr32, preferred-register: '' } 63 - { id: 1, class: gpr32, preferred-register: '' } 64 - { id: 2, class: gpr32, preferred-register: '' } 65 - { id: 3, class: gpr32, preferred-register: '' } 66 - { id: 4, class: gpr32, preferred-register: '' } 67 - { id: 5, class: gpr32, preferred-register: '' } 68 - { id: 6, class: gpr32, preferred-register: '' } 69 - { id: 7, class: gpr32, preferred-register: '' } 70 - { id: 8, class: gpr32, preferred-register: '' } 71 - { id: 9, class: gpr32, preferred-register: '' } 72 - { id: 10, class: gpr32, preferred-register: '' } 73 - { id: 11, class: gpr32, preferred-register: '' } 74 - { id: 12, class: gpr32, preferred-register: '' } 75 - { id: 13, class: gpr32, preferred-register: '' } 76 - { id: 14, class: gpr32, preferred-register: '' } 77 - { id: 15, class: gpr32, preferred-register: '' } 78liveins: 79frameInfo: 80 isFrameAddressTaken: false 81 isReturnAddressTaken: false 82 hasStackMap: false 83 hasPatchPoint: false 84 stackSize: 0 85 offsetAdjustment: 0 86 maxAlignment: 1 87 adjustsStack: false 88 hasCalls: false 89 stackProtector: '' 90 maxCallFrameSize: 4294967295 91 hasOpaqueSPAdjustment: false 92 hasVAStart: false 93 hasMustTailInVarArgFunc: false 94 savePoint: '' 95 restorePoint: '' 96fixedStack: 97stack: 98constants: 99body: | 100 bb.0.entry: 101 %0:gpr32 = LUi target-flags(mips-abs-hi) @bArray 102 %1:gpr32 = ADDiu killed %0, target-flags(mips-abs-lo) @bArray 103 %2:gpr32 = LBuE %1, 5 :: (dereferenceable load 1 from `i8* getelementptr inbounds ([13 x i8], [13 x i8]* @bArray, i32 0, i32 5)`) 104 %3:gpr32 = ADDiu killed %2, -7 105 SBE killed %3, %1, 3 :: (store 1 into `i8* getelementptr inbounds ([13 x i8], [13 x i8]* @bArray, i32 0, i32 3)`) 106 %4:gpr32 = LBE %1, 5 :: (dereferenceable load 1 from `i8* getelementptr inbounds ([13 x i8], [13 x i8]* @bArray, i32 0, i32 5)`) 107 %5:gpr32 = ADDiu killed %4, -7 108 SBE killed %5, %1, 3 :: (store 1 into `i8* getelementptr inbounds ([13 x i8], [13 x i8]* @bArray, i32 0, i32 3)`) 109 %6:gpr32 = LUi target-flags(mips-abs-hi) @hArray 110 %7:gpr32 = ADDiu killed %6, target-flags(mips-abs-lo) @hArray 111 %8:gpr32 = LHuE %7, 10 :: (dereferenceable load 2 from `i16* getelementptr inbounds ([13 x i16], [13 x i16]* @hArray, i32 0, i32 5)`) 112 %9:gpr32 = ADDiu killed %8, -7 113 SHE killed %9, %7, 6 :: (store 2 into `i16* getelementptr inbounds ([13 x i16], [13 x i16]* @hArray, i32 0, i32 3)`) 114 %10:gpr32 = LHE %7, 10 :: (dereferenceable load 2 from `i16* getelementptr inbounds ([13 x i16], [13 x i16]* @hArray, i32 0, i32 5)`) 115 %11:gpr32 = ADDiu killed %10, -7 116 SHE killed %11, %7, 6 :: (store 2 into `i16* getelementptr inbounds ([13 x i16], [13 x i16]* @hArray, i32 0, i32 3)`) 117 %12:gpr32 = LUi target-flags(mips-abs-hi) @wArray 118 %13:gpr32 = ADDiu killed %12, target-flags(mips-abs-lo) @wArray 119 %14:gpr32 = LWE %13, 20 :: (dereferenceable load 4 from `i32* getelementptr inbounds ([13 x i32], [13 x i32]* @wArray, i32 0, i32 5)`) 120 %15:gpr32 = ADDiu killed %14, -7 121 SWE killed %15, %13, 12 :: (store 4 into `i32* getelementptr inbounds ([13 x i32], [13 x i32]* @wArray, i32 0, i32 3)`) 122 RetRA 123 124... 125--- 126name: _Z3barPi 127alignment: 2 128exposesReturnsTwice: false 129legalized: false 130regBankSelected: false 131selected: false 132tracksRegLiveness: true 133registers: 134 - { id: 0, class: gpr32, preferred-register: '' } 135 - { id: 1, class: gpr32, preferred-register: '' } 136 - { id: 2, class: gpr32, preferred-register: '' } 137 - { id: 3, class: gpr32, preferred-register: '' } 138 - { id: 4, class: gpr32, preferred-register: '' } 139 - { id: 5, class: gpr32, preferred-register: '' } 140 - { id: 6, class: gpr32, preferred-register: '' } 141 - { id: 7, class: gpr32, preferred-register: '' } 142 - { id: 8, class: gpr32, preferred-register: '' } 143liveins: 144 - { reg: '$a0', virtual-reg: '%0' } 145frameInfo: 146 isFrameAddressTaken: false 147 isReturnAddressTaken: false 148 hasStackMap: false 149 hasPatchPoint: false 150 stackSize: 0 151 offsetAdjustment: 0 152 maxAlignment: 4 153 adjustsStack: false 154 hasCalls: false 155 stackProtector: '' 156 maxCallFrameSize: 4294967295 157 hasOpaqueSPAdjustment: false 158 hasVAStart: false 159 hasMustTailInVarArgFunc: false 160 savePoint: '' 161 restorePoint: '' 162fixedStack: 163stack: 164 - { id: 0, name: z.addr, type: default, offset: 0, size: 4, alignment: 4, 165 stack-id: 0, callee-saved-register: '', callee-saved-restored: true, 166 debug-info-variable: '', debug-info-expression: '', 167 debug-info-location: '' } 168constants: 169body: | 170 bb.0.entry: 171 successors: %bb.1(0x80000000) 172 liveins: $a0 173 174 %0:gpr32 = COPY $a0 175 %1:gpr32 = COPY %0 176 SW %0, %stack.0.z.addr, 0 :: (store 4 into %ir.z.addr) 177 %2:gpr32 = LW %stack.0.z.addr, 0 :: (dereferenceable load 4 from %ir.z.addr) 178 SYNC 0 179 %3:gpr32 = ADDiu $zero, 42 180 181 bb.1.entry: 182 successors: %bb.1(0x40000000), %bb.2(0x40000000) 183 184 %4:gpr32 = LLE %2, 0 185 %6:gpr32 = ADDu %4, %3 186 %8:gpr32 = SCE %6, %2, 0 187 BEQ %8, $zero, %bb.1, implicit-def $at 188 189 bb.2.entry: 190 SYNC 0 191 %5:gpr32 = ADDiu killed %4, 42 192 $v0 = COPY %5 193 CACHEE %1, 5, 2 194 PREFE %1, 5, 2 195 RetRA implicit $v0 196 197... 198 199# CHECK: 60 41 60 05 lbue $2, 5($1) 200# CHECK: 60 41 68 05 lbe $2, 5($1) 201# CHECK: 60 41 a8 03 sbe $2, 3($1) 202 203# CHECK: 60 41 62 0a lhue $2, 10($1) 204# CHECK: 60 41 6a 0a lhe $2, 10($1) 205# CHECK: 60 41 aa 06 she $2, 6($1) 206 207# CHECK: 60 41 6e 14 lwe $2, 20($1) 208# CHECK: 60 41 ae 0c swe $2, 12($1) 209 210# CHECK: 60 41 6c 00 lle $2, 0($1) 211# CHECK: 60 81 ac 00 sce $4, 0($1) 212 213# CHECK: 60 41 a6 05 cachee 2, 5($1) 214# CHECK: 60 41 a4 05 prefe 2, 5($1) 215