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1; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=16
2
3@t = global i32 10, align 4
4@f = global i32 199, align 4
5@a = global i32 1, align 4
6@b = global i32 1000, align 4
7@z1 = common global i32 0, align 4
8@z2 = common global i32 0, align 4
9@z3 = common global i32 0, align 4
10@z4 = common global i32 0, align 4
11@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1
12
13define void @calc_seleqk() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" {
14entry:
15  %0 = load i32, i32* @a, align 4
16  %cmp = icmp eq i32 %0, 1
17  br i1 %cmp, label %cond.true, label %cond.false
18
19cond.true:                                        ; preds = %entry
20  %1 = load i32, i32* @t, align 4
21  br label %cond.end
22
23cond.false:                                       ; preds = %entry
24  %2 = load i32, i32* @f, align 4
25  br label %cond.end
26
27cond.end:                                         ; preds = %cond.false, %cond.true
28  %cond = phi i32 [ %1, %cond.true ], [ %2, %cond.false ]
29  store i32 %cond, i32* @z1, align 4
30  %3 = load i32, i32* @a, align 4
31  %cmp1 = icmp eq i32 %3, 1000
32  br i1 %cmp1, label %cond.true2, label %cond.false3
33
34cond.true2:                                       ; preds = %cond.end
35  %4 = load i32, i32* @f, align 4
36  br label %cond.end4
37
38cond.false3:                                      ; preds = %cond.end
39  %5 = load i32, i32* @t, align 4
40  br label %cond.end4
41
42cond.end4:                                        ; preds = %cond.false3, %cond.true2
43  %cond5 = phi i32 [ %4, %cond.true2 ], [ %5, %cond.false3 ]
44  store i32 %cond5, i32* @z2, align 4
45  %6 = load i32, i32* @b, align 4
46  %cmp6 = icmp eq i32 %6, 3
47  br i1 %cmp6, label %cond.true7, label %cond.false8
48
49cond.true7:                                       ; preds = %cond.end4
50  %7 = load i32, i32* @f, align 4
51  br label %cond.end9
52
53cond.false8:                                      ; preds = %cond.end4
54  %8 = load i32, i32* @t, align 4
55  br label %cond.end9
56
57cond.end9:                                        ; preds = %cond.false8, %cond.true7
58  %cond10 = phi i32 [ %7, %cond.true7 ], [ %8, %cond.false8 ]
59  store i32 %cond10, i32* @z3, align 4
60  %9 = load i32, i32* @b, align 4
61  %cmp11 = icmp eq i32 %9, 1000
62  br i1 %cmp11, label %cond.true12, label %cond.false13
63
64cond.true12:                                      ; preds = %cond.end9
65  %10 = load i32, i32* @t, align 4
66  br label %cond.end14
67
68cond.false13:                                     ; preds = %cond.end9
69  %11 = load i32, i32* @f, align 4
70  br label %cond.end14
71
72cond.end14:                                       ; preds = %cond.false13, %cond.true12
73  %cond15 = phi i32 [ %10, %cond.true12 ], [ %11, %cond.false13 ]
74  store i32 %cond15, i32* @z4, align 4
75  ret void
76}
77
78attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" }
79attributes #1 = { "target-cpu"="mips16" "target-features"="+mips16,+o32" }
80
81; 16:	cmpi	${{[0-9]+}}, 1 	# 16 bit inst
82; 16:	btnez	$BB{{[0-9]+}}_{{[0-9]}}
83
84; 16:	cmpi	${{[0-9]+}}, 1000
85; 16:	btnez	$BB{{[0-9]+}}_{{[0-9]}}
86
87; 16:	cmpi	${{[0-9]+}}, 3 	# 16 bit inst
88; 16:	btnez	$BB{{[0-9]+}}_{{[0-9]}}
89
90; 16:	cmpi	${{[0-9]+}}, 1000
91; 16:	btnez	$BB{{[0-9]+}}_{{[0-9]}}
92