1; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 2; RUN: llc -march=mips -mcpu=mips32r6 -mattr=micromips -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=MMR6 3 4@j = global i32 5, align 4 5@k = global i32 10, align 4 6@l = global i32 20, align 4 7@m = global i32 10, align 4 8@r1 = common global i32 0, align 4 9@r2 = common global i32 0, align 4 10@r3 = common global i32 0, align 4 11 12define void @test() nounwind { 13entry: 14 %0 = load i32, i32* @j, align 4 15 %1 = load i32, i32* @k, align 4 16 %cmp = icmp ule i32 %0, %1 17 %conv = zext i1 %cmp to i32 18 store i32 %conv, i32* @r1, align 4 19; 16: sltu ${{[0-9]+}}, ${{[0-9]+}} 20; MMR6: sltu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}} 21; 16: move $[[REGISTER:[0-9]+]], $24 22; 16: xor $[[REGISTER]], ${{[0-9]+}} 23 %2 = load i32, i32* @m, align 4 24 %cmp1 = icmp ule i32 %2, %1 25 %conv2 = zext i1 %cmp1 to i32 26 store i32 %conv2, i32* @r2, align 4 27 ret void 28} 29