1; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- 2 3define void @__divtc3({ ppc_fp128, ppc_fp128 }* noalias sret %agg.result, ppc_fp128 %a, ppc_fp128 %b, ppc_fp128 %c, ppc_fp128 %d) nounwind { 4entry: 5 %imag59 = load ppc_fp128, ppc_fp128* null, align 8 ; <ppc_fp128> [#uses=1] 6 %0 = fmul ppc_fp128 0xM00000000000000000000000000000000, %imag59 ; <ppc_fp128> [#uses=1] 7 %1 = fmul ppc_fp128 0xM00000000000000000000000000000000, 0xM00000000000000000000000000000000 ; <ppc_fp128> [#uses=1] 8 %2 = fadd ppc_fp128 %0, %1 ; <ppc_fp128> [#uses=1] 9 store ppc_fp128 %2, ppc_fp128* null, align 16 10 unreachable 11} 12