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1; RUN: llc -verify-machineinstrs -O0 -mcpu=ppc64 -mtriple=powerpc64-unknown-linux-gnu -fast-isel=false < %s | FileCheck %s
2; RUN: llc -verify-machineinstrs -O0 -mcpu=g4 -mtriple=powerpc-apple-darwin8 < %s | FileCheck -check-prefix=DARWIN32 %s
3; RUN: llc -verify-machineinstrs -O0 -mcpu=970 -mtriple=powerpc64-apple-darwin8 < %s | FileCheck -check-prefix=DARWIN64 %s
4
5; Test case for PR 14779: anonymous aggregates are not handled correctly.
6; Darwin bug report PR 15821 is similar.
7; The bug is triggered by passing a byval structure after an anonymous
8; aggregate.
9
10%tarray = type { i64, i8* }
11
12define i8* @func1({ i64, i8* } %array, i8* %ptr) {
13entry:
14  %array_ptr = extractvalue {i64, i8* } %array, 1
15  %cond = icmp eq i8* %array_ptr, %ptr
16  br i1 %cond, label %equal, label %unequal
17equal:
18  ret i8* %array_ptr
19unequal:
20  ret i8* %ptr
21}
22
23; CHECK-LABEL: func1:
24; CHECK: cmpld {{([0-9]+,)?}}4, 5
25; CHECK-DAG: std 3, -[[OFFSET1:[0-9]+]]
26; CHECK-DAG: std 5, -[[OFFSET2:[0-9]+]]
27; CHECK: ld 3, -[[OFFSET1]](1)
28; CHECK: ld 3, -[[OFFSET2]](1)
29
30; DARWIN32: _func1:
31; DARWIN32: mr
32; DARWIN32: mr r[[REG1:[0-9]+]], r[[REGA:[0-9]+]]
33; DARWIN32: mr r[[REG2:[0-9]+]], r[[REGB:[0-9]+]]
34; DARWIN32: cmplw {{(cr[0-9]+,)?}}r[[REGB]], r[[REGA]]
35; DARWIN32: stw r[[REG1]], -[[OFFSET1:[0-9]+]]
36; DARWIN32: stw r[[REG2]], -[[OFFSET2:[0-9]+]]
37; DARWIN32: lwz r3, -[[OFFSET2]]
38; DARWIN32: lwz r3, -[[OFFSET1]]
39
40; DARWIN64: _func1:
41; DARWIN64: mr
42; DARWIN64: mr r[[REG1:[0-9]+]], r[[REGA:[0-9]+]]
43; DARWIN64: mr r[[REG2:[0-9]+]], r[[REGB:[0-9]+]]
44; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REGB]], r[[REGA]]
45; DARWIN64: std r[[REG1]], -[[OFFSET2:[0-9]+]]
46; DARWIN64: std r[[REG2]], -[[OFFSET1:[0-9]+]]
47; DARWIN64: ld r3, -[[OFFSET1]]
48; DARWIN64: ld r3, -[[OFFSET2]]
49
50
51define i8* @func2({ i64, i8* } %array1, %tarray* byval %array2) {
52entry:
53  %array1_ptr = extractvalue {i64, i8* } %array1, 1
54  %tmp = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1
55  %array2_ptr = load i8*, i8** %tmp
56  %cond = icmp eq i8* %array1_ptr, %array2_ptr
57  br i1 %cond, label %equal, label %unequal
58equal:
59  ret i8* %array1_ptr
60unequal:
61  ret i8* %array2_ptr
62}
63; CHECK-LABEL: func2:
64; CHECK-DAG: cmpld {{([0-9]+,)?}}4, 6
65; CHECK-DAG: std 6, 72(1)
66; CHECK-DAG: std 5, 64(1)
67; CHECK-DAG: std 6, -[[OFFSET1:[0-9]+]]
68; CHECK-DAG: std 5, -[[OFFSET2:[0-9]+]]
69; CHECK: ld 3, -[[OFFSET2]](1)
70; CHECK: ld 3, -[[OFFSET1]](1)
71
72; DARWIN32-LABEL: _func2
73; DARWIN32: mr
74; DARWIN32: addi r[[REG8:[0-9]+]], r[[REGSP:[0-9]+]], 36
75; DARWIN32: mr r[[REG7:[0-9]+]], r5
76; DARWIN32: lwz r[[REG2:[0-9]+]], 44(r[[REGSP]])
77; DARWIN32-DAG: cmplw {{(cr[0-9]+,)?}}r5, r[[REG2]]
78; DARWIN32-DAG: stw r[[REG7]], -[[OFFSET1:[0-9]+]]
79; DARWIN32-DAG: stw r[[REG2]], -[[OFFSET2:[0-9]+]]
80; DARWIN32-DAG: lwz r3, -[[OFFSET1]]
81; DARWIN32-DAG: lwz r3, -[[OFFSET2]]
82
83
84; DARWIN64: _func2:
85; DARWIN64: mr
86; DARWIN64: mr r[[REG3:[0-9]+]], r[[REGA:[0-9]+]]
87; DARWIN64: ld r[[REG2:[0-9]+]], 72(r1)
88; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REGA]], r[[REG2]]
89; DARWIN64: std r[[REG2]], -[[OFFSET2:[0-9]+]]
90; DARWIN64: std r[[REG3]], -[[OFFSET1:[0-9]+]]
91; DARWIN64: ld r3, -[[OFFSET1]]
92; DARWIN64: ld r3, -[[OFFSET2]]
93
94
95define i8* @func3({ i64, i8* }* byval %array1, %tarray* byval %array2) {
96entry:
97  %tmp1 = getelementptr inbounds { i64, i8* }, { i64, i8* }* %array1, i32 0, i32 1
98  %array1_ptr = load i8*, i8** %tmp1
99  %tmp2 = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1
100  %array2_ptr = load i8*, i8** %tmp2
101  %cond = icmp eq i8* %array1_ptr, %array2_ptr
102  br i1 %cond, label %equal, label %unequal
103equal:
104  ret i8* %array1_ptr
105unequal:
106  ret i8* %array2_ptr
107}
108
109; CHECK-LABEL: func3:
110; CHECK-DAG: cmpld {{([0-9]+,)?}}3, 4
111; CHECK-DAG: std 3, -[[OFFSET2:[0-9]+]](1)
112; CHECK-DAG: std 4, -[[OFFSET1:[0-9]+]](1)
113; CHECK: ld 3, -[[OFFSET2]](1)
114; CHECK: ld 3, -[[OFFSET1]](1)
115
116; DARWIN32-LABEL: _func3:
117; DARWIN32-DAG: stw r[[REG8:[0-9]+]], 44(r[[REGSP:[0-9]+]])
118; DARWIN32-DAG: stw r[[REG5:[0-9]+]], 32(r[[REGSP]])
119; DARWIN32-DAG: addi r[[REG5a:[0-9]+]], r[[REGSP:[0-9]+]], 36
120; DARWIN32-DAG: addi r[[REG8a:[0-9]+]], r[[REGSP]], 24
121; DARWIN32-DAG: lwz r[[REG5a:[0-9]+]], 44(r[[REGSP]])
122; DARWIN32-DAG: lwz r[[REG8a:[0-9]+]], 32(r[[REGSP]])
123; DARWIN32-DAG: cmplw {{(cr[0-9]+,)?}}r[[REG8a]], r[[REG5a]]
124; DARWIN32-DAG: stw r[[REG5a]], -[[OFFSET1:[0-9]+]]
125; DARWIN32-DAG: stw r[[REG8a]], -[[OFFSET2:[0-9]+]]
126; DARWIN32-DAG: lwz r3, -[[OFFSET1:[0-9]+]]
127; DARWIN32-DAG: lwz r3, -[[OFFSET2:[0-9]+]]
128
129; DARWIN64: _func3:
130; DARWIN64-DAG: ld r[[REG3:[0-9]+]], 72(r1)
131; DARWIN64-DAG: ld r[[REG4:[0-9]+]], 56(r1)
132; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REG4]], r[[REG3]]
133; DARWIN64: std r[[REG4]], -[[OFFSET1:[0-9]+]]
134; DARWIN64: std r[[REG3]], -[[OFFSET2:[0-9]+]]
135; DARWIN64: ld r3, -[[OFFSET1]]
136; DARWIN64: ld r3, -[[OFFSET2]]
137
138
139define i8* @func4(i64 %p1, i64 %p2, i64 %p3, i64 %p4,
140                  i64 %p5, i64 %p6, i64 %p7, i64 %p8,
141                  { i64, i8* } %array1, %tarray* byval %array2) {
142entry:
143  %array1_ptr = extractvalue {i64, i8* } %array1, 1
144  %tmp = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1
145  %array2_ptr = load i8*, i8** %tmp
146  %cond = icmp eq i8* %array1_ptr, %array2_ptr
147  br i1 %cond, label %equal, label %unequal
148equal:
149  ret i8* %array1_ptr
150unequal:
151  ret i8* %array2_ptr
152}
153
154; CHECK-LABEL: func4:
155; CHECK-DAG: ld [[REG2:[0-9]+]], 120(1)
156; CHECK-DAG: ld [[REG3:[0-9]+]], 136(1)
157; CHECK-DAG: cmpld {{([0-9]+,)?}}[[REG2]], [[REG3]]
158; CHECK: std [[REG2]], -[[OFFSET1:[0-9]+]](1)
159; CHECK: std [[REG3]], -[[OFFSET2:[0-9]+]](1)
160; CHECK: ld 3, -[[OFFSET1]](1)
161; CHECK: ld 3, -[[OFFSET2]](1)
162
163; DARWIN32: _func4:
164; DARWIN32: lwz r[[REG4:[0-9]+]], 96(r1)
165; DARWIN32: addi r[[REG1:[0-9]+]], r1, 100
166; DARWIN32: mr r[[REG2:[0-9]+]], r[[REG4]]
167; DARWIN32: lwz r[[REG3:[0-9]+]], 108(r1)
168; DARWIN32: cmplw {{(cr[0-9]+,)?}}r[[REG4]], r[[REG3]]
169; DARWIN32-DAG: stw r[[REG2]], -[[OFFSET1:[0-9]+]]
170; DARWIN32-DAG: stw r[[REG3]], -[[OFFSET2:[0-9]+]]
171; DARWIN32: lwz r3, -[[OFFSET1]]
172; DARWIN32: lwz r3, -[[OFFSET2]]
173
174; DARWIN64: _func4:
175; DARWIN64: ld r[[REG2:[0-9]+]], 120(r1)
176; DARWIN64-DAG: ld r[[REG3:[0-9]+]], 136(r1)
177; DARWIN64-DAG: mr r[[REG4:[0-9]+]], r[[REG2]]
178; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REG2]], r[[REG3]]
179; DARWIN64: std r[[REG3]], -[[OFFSET2:[0-9]+]]
180; DARWIN64: std r[[REG4]], -[[OFFSET1:[0-9]+]]
181; DARWIN64: ld r3, -[[OFFSET1]]
182; DARWIN64: ld r3, -[[OFFSET2]]
183