1; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -mattr=-crbits -disable-ppc-cmp-opt=0 | FileCheck %s 2; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -mattr=-crbits -disable-ppc-cmp-opt=0 -ppc-gen-isel=false | FileCheck --check-prefix=CHECK-NO-ISEL %s 3target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" 4target triple = "powerpc64-unknown-linux-gnu" 5 6define signext i32 @foo(i32 signext %a, i32 signext %b, i32* nocapture %c) #0 { 7entry: 8 %sub = sub nsw i32 %a, %b 9 store i32 %sub, i32* %c, align 4 10 %cmp = icmp sgt i32 %a, %b 11 %cond = select i1 %cmp, i32 %a, i32 %b 12 ret i32 %cond 13 14; CHECK: @foo 15; CHECK-NOT: subf. 16} 17 18define signext i32 @foo2(i32 signext %a, i32 signext %b, i32* nocapture %c) #0 { 19entry: 20 %shl = shl i32 %a, %b 21 store i32 %shl, i32* %c, align 4 22 %cmp = icmp sgt i32 %shl, 0 23 %conv = zext i1 %cmp to i32 24 ret i32 %conv 25 26; CHECK: @foo2 27; CHECK-NOT: slw. 28} 29 30define i64 @fool(i64 %a, i64 %b, i64* nocapture %c) #0 { 31entry: 32 %sub = sub nsw i64 %a, %b 33 store i64 %sub, i64* %c, align 8 34 %cmp = icmp sgt i64 %a, %b 35 %cond = select i1 %cmp, i64 %a, i64 %b 36 ret i64 %cond 37 38; CHECK-LABEL: @fool 39; CHECK-NO-ISEL-LABEL: @fool 40; CHECK: subf. [[REG:[0-9]+]], 4, 3 41; CHECK: isel 3, 3, 4, 1 42; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]] 43; CHECK-NO-ISEL: ori 3, 4, 0 44; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]] 45 46; CHECK: std [[REG]], 0(5) 47} 48 49define i64 @foolb(i64 %a, i64 %b, i64* nocapture %c) #0 { 50entry: 51 %sub = sub nsw i64 %a, %b 52 store i64 %sub, i64* %c, align 8 53 %cmp = icmp sle i64 %a, %b 54 %cond = select i1 %cmp, i64 %a, i64 %b 55 ret i64 %cond 56 57; CHECK-LABEL: @foolb 58; CHECK-NO-ISEL-LABEL: @foolb 59; CHECK: subf. [[REG:[0-9]+]], 4, 3 60; CHECK: isel 3, 4, 3, 1 61; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]] 62; CHECK-NO-ISEL-NEXT: b .LBB 63; CHECK-NO-ISEL addi: 3, 4, 0 64; CHECK: std [[REG]], 0(5) 65} 66 67define i64 @foolc(i64 %a, i64 %b, i64* nocapture %c) #0 { 68entry: 69 %sub = sub nsw i64 %b, %a 70 store i64 %sub, i64* %c, align 8 71 %cmp = icmp sgt i64 %a, %b 72 %cond = select i1 %cmp, i64 %a, i64 %b 73 ret i64 %cond 74 75; CHECK-LABEL: @foolc 76; CHECK-NO-ISEL-LABEL: @foolc 77; CHECK: subf. [[REG:[0-9]+]], 3, 4 78; CHECK: isel 3, 3, 4, 0 79; CHECK-NO-ISEL: bc 12, 0, [[TRUE:.LBB[0-9]+]] 80; CHECK-NO-ISEL: ori 3, 4, 0 81; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]] 82; CHECK: std [[REG]], 0(5) 83} 84 85define i64 @foold(i64 %a, i64 %b, i64* nocapture %c) #0 { 86entry: 87 %sub = sub nsw i64 %b, %a 88 store i64 %sub, i64* %c, align 8 89 %cmp = icmp slt i64 %a, %b 90 %cond = select i1 %cmp, i64 %a, i64 %b 91 ret i64 %cond 92 93; CHECK-LABEL: @foold 94; CHECK-NO-ISEL-LABEL: @foold 95; CHECK: subf. [[REG:[0-9]+]], 3, 4 96; CHECK: isel 3, 3, 4, 1 97; CHECK-NO-ISEL: bc 12, 1, [[TRUE:.LBB[0-9]+]] 98; CHECK-NO-ISEL: ori 3, 4, 0 99; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]] 100; CHECK: std [[REG]], 0(5) 101} 102 103define i64 @foold2(i64 %a, i64 %b, i64* nocapture %c) #0 { 104entry: 105 %sub = sub nsw i64 %a, %b 106 store i64 %sub, i64* %c, align 8 107 %cmp = icmp slt i64 %a, %b 108 %cond = select i1 %cmp, i64 %a, i64 %b 109 ret i64 %cond 110 111; CHECK-LABEL: @foold2 112; CHECK-NO-ISEL-LABEL: @foold2 113; CHECK: subf. [[REG:[0-9]+]], 4, 3 114; CHECK: isel 3, 3, 4, 0 115; CHECK-NO-ISEL: bc 12, 0, [[TRUE:.LBB[0-9]+]] 116; CHECK-NO-ISEL: ori 3, 4, 0 117; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]] 118; CHECK: std [[REG]], 0(5) 119} 120 121define i64 @foo2l(i64 %a, i64 %b, i64* nocapture %c) #0 { 122entry: 123 %shl = shl i64 %a, %b 124 store i64 %shl, i64* %c, align 8 125 %cmp = icmp sgt i64 %shl, 0 126 %conv1 = zext i1 %cmp to i64 127 ret i64 %conv1 128 129; CHECK: @foo2l 130; CHECK: sld 4, 3, 4 131; CHECK: std 4, 0(5) 132} 133 134define double @food(double %a, double %b, double* nocapture %c) #0 { 135entry: 136 %sub = fsub double %a, %b 137 store double %sub, double* %c, align 8 138 %cmp = fcmp ogt double %a, %b 139 %cond = select i1 %cmp, double %a, double %b 140 ret double %cond 141 142; CHECK: @food 143; CHECK-NOT: fsub. 0, 1, 2 144; CHECK: stfd 0, 0(5) 145} 146 147define float @foof(float %a, float %b, float* nocapture %c) #0 { 148entry: 149 %sub = fsub float %a, %b 150 store float %sub, float* %c, align 4 151 %cmp = fcmp ogt float %a, %b 152 %cond = select i1 %cmp, float %a, float %b 153 ret float %cond 154 155; CHECK: @foof 156; CHECK-NOT: fsubs. 0, 1, 2 157; CHECK: stfs 0, 0(5) 158} 159 160declare i64 @llvm.ctpop.i64(i64); 161 162define signext i64 @fooct(i64 signext %a, i64 signext %b, i64* nocapture %c) #0 { 163entry: 164 %sub = sub nsw i64 %a, %b 165 %subc = call i64 @llvm.ctpop.i64(i64 %sub) 166 store i64 %subc, i64* %c, align 4 167 %cmp = icmp sgt i64 %subc, 0 168 %cond = select i1 %cmp, i64 %a, i64 %b 169 ret i64 %cond 170 171; CHECK: @fooct 172; CHECK-NOT: popcntd. 173} 174 175