1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 2; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 3; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 5; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 6; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 7; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 8 9@glob = common local_unnamed_addr global i32 0, align 4 10 11define signext i32 @test_inesi(i32 signext %a, i32 signext %b) { 12; CHECK-LABEL: test_inesi: 13; CHECK: xor r3, r3, r4 14; CHECK-NEXT: cntlzw r3, r3 15; CHECK-NEXT: srwi r3, r3, 5 16; CHECK-NEXT: xori r3, r3, 1 17; CHECK-NEXT: blr 18entry: 19 %cmp = icmp ne i32 %a, %b 20 %conv = zext i1 %cmp to i32 21 ret i32 %conv 22} 23 24define signext i32 @test_inesi_sext(i32 signext %a, i32 signext %b) { 25; CHECK-LABEL: test_inesi_sext: 26; CHECK: xor r3, r3, r4 27; CHECK-NEXT: cntlzw r3, r3 28; CHECK-NEXT: srwi r3, r3, 5 29; CHECK-NEXT: xori r3, r3, 1 30; CHECK-NEXT: neg r3, r3 31; CHECK-NEXT: blr 32entry: 33 %cmp = icmp ne i32 %a, %b 34 %sub = sext i1 %cmp to i32 35 ret i32 %sub 36} 37 38define signext i32 @test_inesi_z(i32 signext %a) { 39; CHECK-LABEL: test_inesi_z: 40; CHECK: cntlzw r3, r3 41; CHECK-NEXT: srwi r3, r3, 5 42; CHECK-NEXT: xori r3, r3, 1 43; CHECK-NEXT: blr 44entry: 45 %cmp = icmp ne i32 %a, 0 46 %conv = zext i1 %cmp to i32 47 ret i32 %conv 48} 49 50define signext i32 @test_inesi_sext_z(i32 signext %a) { 51; CHECK-LABEL: test_inesi_sext_z: 52; CHECK: cntlzw r3, r3 53; CHECK-NEXT: srwi r3, r3, 5 54; CHECK-NEXT: xori r3, r3, 1 55; CHECK-NEXT: neg r3, r3 56; CHECK-NEXT: blr 57entry: 58 %cmp = icmp ne i32 %a, 0 59 %sub = sext i1 %cmp to i32 60 ret i32 %sub 61} 62 63define void @test_inesi_store(i32 signext %a, i32 signext %b) { 64; CHECK-LABEL: test_inesi_store: 65; CHECK: xor r3, r3, r4 66; CHECK: cntlzw r3, r3 67; CHECK: srwi r3, r3, 5 68; CHECK: xori r3, r3, 1 69; CHECK: stw r3, 0(r4) 70; CHECK-NEXT: blr 71entry: 72 %cmp = icmp ne i32 %a, %b 73 %conv = zext i1 %cmp to i32 74 store i32 %conv, i32* @glob, align 4 75 ret void 76} 77 78define void @test_inesi_sext_store(i32 signext %a, i32 signext %b) { 79; CHECK-LABEL: test_inesi_sext_store: 80; CHECK: xor r3, r3, r4 81; CHECK: cntlzw r3, r3 82; CHECK: srwi r3, r3, 5 83; CHECK: xori r3, r3, 1 84; CHECK: neg r3, r3 85; CHECK: stw r3, 0(r4) 86; CHECK-NEXT: blr 87entry: 88 %cmp = icmp ne i32 %a, %b 89 %sub = sext i1 %cmp to i32 90 store i32 %sub, i32* @glob, align 4 91 ret void 92} 93 94define void @test_inesi_z_store(i32 signext %a) { 95; CHECK-LABEL: test_inesi_z_store: 96; CHECK: cntlzw r3, r3 97; CHECK: srwi r3, r3, 5 98; CHECK: xori r3, r3, 1 99; CHECK: stw r3, 0(r4) 100; CHECK-NEXT: blr 101entry: 102 %cmp = icmp ne i32 %a, 0 103 %conv = zext i1 %cmp to i32 104 store i32 %conv, i32* @glob, align 4 105 ret void 106} 107 108define void @test_inesi_sext_z_store(i32 signext %a) { 109; CHECK-LABEL: test_inesi_sext_z_store: 110; CHECK: cntlzw r3, r3 111; CHECK: srwi r3, r3, 5 112; CHECK: xori r3, r3, 1 113; CHECK: neg r3, r3 114; CHECK: stw r3, 0(r4) 115; CHECK-NEXT: blr 116entry: 117 %cmp = icmp ne i32 %a, 0 118 %sub = sext i1 %cmp to i32 119 store i32 %sub, i32* @glob, align 4 120 ret void 121} 122