1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 2; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 3; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 5; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 6; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 7 8@glob = common local_unnamed_addr global i32 0, align 4 9 10; Function Attrs: norecurse nounwind readnone 11define i64 @test_llgtui(i32 zeroext %a, i32 zeroext %b) { 12; CHECK-LABEL: test_llgtui: 13; CHECK-NOT: clrldi 14; CHECK: sub [[REG:r[0-9]+]], r4, r3 15; CHECK-NEXT: rldicl r3, [[REG]], 1, 63 16entry: 17 %cmp = icmp ugt i32 %a, %b 18 %conv1 = zext i1 %cmp to i64 19 ret i64 %conv1 20} 21 22; Function Attrs: norecurse nounwind readnone 23define i64 @test_llgtui_sext(i32 zeroext %a, i32 zeroext %b) { 24; CHECK-LABEL: test_llgtui_sext: 25; CHECK: sub [[REG:r[0-9]+]], r4, r3 26; CHECK-NEXT: sradi r3, [[REG]], 63 27; CHECK-NEXT: blr 28entry: 29 %cmp = icmp ugt i32 %a, %b 30 %conv1 = sext i1 %cmp to i64 31 ret i64 %conv1 32} 33 34; Function Attrs: norecurse nounwind readnone 35define i64 @test_llgtui_z(i32 zeroext %a) { 36; CHECK-LABEL: test_llgtui_z: 37; CHECK: cntlzw r3, r3 38; CHECK-NEXT: srwi r3, r3, 5 39; CHECK-NEXT: xori r3, r3, 1 40; CHECK-NEXT: blr 41entry: 42 %cmp = icmp ne i32 %a, 0 43 %conv1 = zext i1 %cmp to i64 44 ret i64 %conv1 45} 46 47; Function Attrs: norecurse nounwind readnone 48define i64 @test_llgtui_sext_z(i32 zeroext %a) { 49; CHECK-LABEL: test_llgtui_sext_z: 50; CHECK: cntlzw r3, r3 51; CHECK-NEXT: srwi r3, r3, 5 52; CHECK-NEXT: xori r3, r3, 1 53; CHECK-NEXT: neg r3, r3 54; CHECK-NEXT: blr 55entry: 56 %cmp = icmp ne i32 %a, 0 57 %conv1 = sext i1 %cmp to i64 58 ret i64 %conv1 59} 60 61; Function Attrs: norecurse nounwind 62define void @test_llgtui_store(i32 zeroext %a, i32 zeroext %b) { 63; CHECK-LABEL: test_llgtui_store: 64; CHECK: sub [[REG:r[0-9]+]], r4, r3 65; CHECK: rldicl {{r[0-9]+}}, [[REG]], 1, 63 66entry: 67 %cmp = icmp ugt i32 %a, %b 68 %conv = zext i1 %cmp to i32 69 store i32 %conv, i32* @glob, align 4 70 ret void 71} 72 73; Function Attrs: norecurse nounwind 74define void @test_llgtui_sext_store(i32 zeroext %a, i32 zeroext %b) { 75; CHECK-LABEL: test_llgtui_sext_store: 76; CHECK: sub [[REG:r[0-9]+]], r4, r3 77; CHECK: sradi {{r[0-9]+}}, [[REG]], 63 78entry: 79 %cmp = icmp ugt i32 %a, %b 80 %sub = sext i1 %cmp to i32 81 store i32 %sub, i32* @glob, align 4 82 ret void 83} 84 85; Function Attrs: norecurse nounwind 86define void @test_llgtui_z_store(i32 zeroext %a) { 87; CHECK-LABEL: test_llgtui_z_store: 88; CHECK: cntlzw r3, r3 89; CHECK: srwi r3, r3, 5 90; CHECK: xori r3, r3, 1 91; CHECK: stw r3, 0(r4) 92; CHECK-NEXT: blr 93entry: 94 %cmp = icmp ne i32 %a, 0 95 %conv = zext i1 %cmp to i32 96 store i32 %conv, i32* @glob, align 4 97 ret void 98} 99 100; Function Attrs: norecurse nounwind 101define void @test_llgtui_sext_z_store(i32 zeroext %a) { 102; CHECK-LABEL: test_llgtui_sext_z_store: 103; CHECK: cntlzw r3, r3 104; CHECK: srwi r3, r3, 5 105; CHECK: xori r3, r3, 1 106; CHECK: neg r3, r3 107; CHECK: stw r3, 0(r4) 108; CHECK-NEXT: blr 109entry: 110 %cmp = icmp ne i32 %a, 0 111 %sub = sext i1 %cmp to i32 112 store i32 %sub, i32* @glob, align 4 113 ret void 114} 115