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1; Test the vector min/max doubleword instructions added for P8
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
3; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s
4
5declare <2 x i64> @llvm.ppc.altivec.vmaxsd(<2 x i64>, <2 x i64>) nounwind readnone
6declare <2 x i64> @llvm.ppc.altivec.vmaxud(<2 x i64>, <2 x i64>) nounwind readnone
7declare <2 x i64> @llvm.ppc.altivec.vminsd(<2 x i64>, <2 x i64>) nounwind readnone
8declare <2 x i64> @llvm.ppc.altivec.vminud(<2 x i64>, <2 x i64>) nounwind readnone
9
10define <2 x i64> @test_vmaxsd(<2 x i64> %x, <2 x i64> %y) {
11       %tmp = tail call <2 x i64> @llvm.ppc.altivec.vmaxsd(<2 x i64> %x, <2 x i64> %y)
12       ret <2 x i64> %tmp
13; CHECK: vmaxsd 2, 2, 3
14}
15
16define <2 x i64> @test_vmaxud(<2 x i64> %x, <2 x i64> %y) {
17       %tmp = tail call <2 x i64> @llvm.ppc.altivec.vmaxud(<2 x i64> %x, <2 x i64> %y)
18       ret <2 x i64> %tmp
19; CHECK: vmaxud 2, 2, 3
20}
21
22define <2 x i64> @test_vminsd(<2 x i64> %x, <2 x i64> %y) {
23       %tmp = tail call <2 x i64> @llvm.ppc.altivec.vminsd(<2 x i64> %x, <2 x i64> %y)
24       ret <2 x i64> %tmp
25; CHECK: vminsd 2, 2, 3
26}
27
28define <2 x i64> @test_vminud(<2 x i64> %x, <2 x i64> %y) {
29       %tmp = tail call <2 x i64> @llvm.ppc.altivec.vminud(<2 x i64> %x, <2 x i64> %y)
30       ret <2 x i64> %tmp
31; CHECK: vminud 2, 2, 3
32}
33
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35