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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN:   | FileCheck -check-prefix=RV32I %s
4
5; This test checks that LLVM can do basic stripping and reapplying of branches
6; to basic blocks.
7
8declare void @test_true()
9declare void @test_false()
10
11; !0 corresponds to a branch being taken, !1 to not being takne.
12!0 = !{!"branch_weights", i32 64, i32 4}
13!1 = !{!"branch_weights", i32 4, i32 64}
14
15define void @test_bcc_fallthrough_taken(i32 %in) nounwind {
16; RV32I-LABEL: test_bcc_fallthrough_taken:
17; RV32I:       # %bb.0:
18; RV32I-NEXT:    addi sp, sp, -16
19; RV32I-NEXT:    sw ra, 12(sp)
20; RV32I-NEXT:    addi a1, zero, 42
21; RV32I-NEXT:    bne a0, a1, .LBB0_3
22; RV32I-NEXT:  # %bb.1: # %true
23; RV32I-NEXT:    call test_true
24; RV32I-NEXT:  .LBB0_2: # %true
25; RV32I-NEXT:    lw ra, 12(sp)
26; RV32I-NEXT:    addi sp, sp, 16
27; RV32I-NEXT:    ret
28; RV32I-NEXT:  .LBB0_3: # %false
29; RV32I-NEXT:    call test_false
30; RV32I-NEXT:    j .LBB0_2
31  %tst = icmp eq i32 %in, 42
32  br i1 %tst, label %true, label %false, !prof !0
33
34; Expected layout order is: Entry, TrueBlock, FalseBlock
35; Entry->TrueBlock is the common path, which should be taken whenever the
36; conditional branch is false.
37
38true:
39  call void @test_true()
40  ret void
41
42false:
43  call void @test_false()
44  ret void
45}
46
47define void @test_bcc_fallthrough_nottaken(i32 %in) nounwind {
48; RV32I-LABEL: test_bcc_fallthrough_nottaken:
49; RV32I:       # %bb.0:
50; RV32I-NEXT:    addi sp, sp, -16
51; RV32I-NEXT:    sw ra, 12(sp)
52; RV32I-NEXT:    addi a1, zero, 42
53; RV32I-NEXT:    beq a0, a1, .LBB1_3
54; RV32I-NEXT:  # %bb.1: # %false
55; RV32I-NEXT:    call test_false
56; RV32I-NEXT:  .LBB1_2: # %true
57; RV32I-NEXT:    lw ra, 12(sp)
58; RV32I-NEXT:    addi sp, sp, 16
59; RV32I-NEXT:    ret
60; RV32I-NEXT:  .LBB1_3: # %true
61; RV32I-NEXT:    call test_true
62; RV32I-NEXT:    j .LBB1_2
63  %tst = icmp eq i32 %in, 42
64  br i1 %tst, label %true, label %false, !prof !1
65
66; Expected layout order is: Entry, FalseBlock, TrueBlock
67; Entry->FalseBlock is the common path, which should be taken whenever the
68; conditional branch is false
69
70true:
71  call void @test_true()
72  ret void
73
74false:
75  call void @test_false()
76  ret void
77}
78
79; TODO: how can we expand the coverage of the branch analysis functions?
80