1; Test 32-bit atomic ORs, z196 version. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s 4 5; Check OR of a variable. 6define i32 @f1(i32 %dummy, i32 *%src, i32 %b) { 7; CHECK-LABEL: f1: 8; CHECK: lao %r2, %r4, 0(%r3) 9; CHECK: br %r14 10 %res = atomicrmw or i32 *%src, i32 %b seq_cst 11 ret i32 %res 12} 13 14; Check OR of 1, which needs a temporary. 15define i32 @f2(i32 %dummy, i32 *%src) { 16; CHECK-LABEL: f2: 17; CHECK: lhi [[TMP:%r[0-5]]], 1 18; CHECK: lao %r2, [[TMP]], 0(%r3) 19; CHECK: br %r14 20 %res = atomicrmw or i32 *%src, i32 1 seq_cst 21 ret i32 %res 22} 23 24; Check the high end of the LAO range. 25define i32 @f3(i32 %dummy, i32 *%src, i32 %b) { 26; CHECK-LABEL: f3: 27; CHECK: lao %r2, %r4, 524284(%r3) 28; CHECK: br %r14 29 %ptr = getelementptr i32, i32 *%src, i32 131071 30 %res = atomicrmw or i32 *%ptr, i32 %b seq_cst 31 ret i32 %res 32} 33 34; Check the next word up, which needs separate address logic. 35define i32 @f4(i32 %dummy, i32 *%src, i32 %b) { 36; CHECK-LABEL: f4: 37; CHECK: agfi %r3, 524288 38; CHECK: lao %r2, %r4, 0(%r3) 39; CHECK: br %r14 40 %ptr = getelementptr i32, i32 *%src, i32 131072 41 %res = atomicrmw or i32 *%ptr, i32 %b seq_cst 42 ret i32 %res 43} 44 45; Check the low end of the LAO range. 46define i32 @f5(i32 %dummy, i32 *%src, i32 %b) { 47; CHECK-LABEL: f5: 48; CHECK: lao %r2, %r4, -524288(%r3) 49; CHECK: br %r14 50 %ptr = getelementptr i32, i32 *%src, i32 -131072 51 %res = atomicrmw or i32 *%ptr, i32 %b seq_cst 52 ret i32 %res 53} 54 55; Check the next word down, which needs separate address logic. 56define i32 @f6(i32 %dummy, i32 *%src, i32 %b) { 57; CHECK-LABEL: f6: 58; CHECK: agfi %r3, -524292 59; CHECK: lao %r2, %r4, 0(%r3) 60; CHECK: br %r14 61 %ptr = getelementptr i32, i32 *%src, i32 -131073 62 %res = atomicrmw or i32 *%ptr, i32 %b seq_cst 63 ret i32 %res 64} 65