1; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 -verify-machineinstrs | FileCheck %s 2; 3; Test that early if conversion produces LOCR with operands of the right 4; register classes. 5 6define void @autogen_SD4739(i8*) { 7; CHECK-NOT: Expected a GR32Bit register, but got a GRX32Bit register 8BB: 9 %L34 = load i8, i8* %0 10 %Cmp56 = icmp sgt i8 undef, %L34 11 br label %CF246 12 13CF246: ; preds = %CF246, %BB 14 %Sl163 = select i1 %Cmp56, i8 %L34, i8 undef 15 br i1 undef, label %CF246, label %CF248 16 17CF248: ; preds = %CF248, %CF246 18 store i8 %Sl163, i8* %0 19 br label %CF248 20} 21