1; Test the Test Data Class instruction logic operation conversion from 2; compares, combined with signbit or other compares to ensure worthiness. 3; 4; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 5; 6 7declare float @llvm.fabs.f32(float) 8declare double @llvm.fabs.f64(double) 9declare fp128 @llvm.fabs.f128(fp128) 10 11; Compare with 0, extract sign bit 12define i32 @f1(float %x) { 13; CHECK-LABEL: f1 14; CHECK: tceb %f0, 2047 15 %cast = bitcast float %x to i32 16 %sign = icmp slt i32 %cast, 0 17 %fcmp = fcmp ugt float %x, 0.0 18 %res = or i1 %sign, %fcmp 19 %xres = zext i1 %res to i32 20 ret i32 %xres 21} 22 23; Compare with inf, extract negated sign bit 24define i32 @f2(float %x) { 25; CHECK-LABEL: f2 26; CHECK: tceb %f0, 2698 27 %cast = bitcast float %x to i32 28 %sign = icmp sgt i32 %cast, -1 29 %fcmp = fcmp ult float %x, 0x7ff0000000000000 30 %res = and i1 %sign, %fcmp 31 %xres = zext i1 %res to i32 32 ret i32 %xres 33} 34 35; Compare with minnorm, extract negated sign bit 36define i32 @f3(float %x) { 37; CHECK-LABEL: f3 38; CHECK: tceb %f0, 2176 39 %cast = bitcast float %x to i32 40 %sign = icmp sgt i32 %cast, -1 41 %fcmp = fcmp olt float %x, 0x3810000000000000 42 %res = and i1 %sign, %fcmp 43 %xres = zext i1 %res to i32 44 ret i32 %xres 45} 46 47; Test float isnormal, from clang. 48define i32 @f4(float %x) { 49; CHECK-LABEL: f4 50; CHECK: tceb %f0, 768 51 %y = call float @llvm.fabs.f32(float %x) 52 %ord = fcmp ord float %x, 0.0 53 %a = fcmp ult float %y, 0x7ff0000000000000 54 %b = fcmp uge float %y, 0x3810000000000000 55 %c = and i1 %a, %b 56 %res = and i1 %ord, %c 57 %xres = zext i1 %res to i32 58 ret i32 %xres 59} 60 61; Check for negative 0. 62define i32 @f5(float %x) { 63; CHECK-LABEL: f5 64; CHECK: tceb %f0, 1024 65 %cast = bitcast float %x to i32 66 %sign = icmp slt i32 %cast, 0 67 %fcmp = fcmp oeq float %x, 0.0 68 %res = and i1 %sign, %fcmp 69 %xres = zext i1 %res to i32 70 ret i32 %xres 71} 72 73; Test isnormal, from clang. 74define i32 @f6(double %x) { 75; CHECK-LABEL: f6 76; CHECK: tcdb %f0, 768 77 %y = call double @llvm.fabs.f64(double %x) 78 %ord = fcmp ord double %x, 0.0 79 %a = fcmp ult double %y, 0x7ff0000000000000 80 %b = fcmp uge double %y, 0x0010000000000000 81 %c = and i1 %ord, %a 82 %res = and i1 %b, %c 83 %xres = zext i1 %res to i32 84 ret i32 %xres 85} 86 87; Test isinf || isnan, from clang. 88define i32 @f7(double %x) { 89; CHECK-LABEL: f7 90; CHECK: tcdb %f0, 63 91 %y = call double @llvm.fabs.f64(double %x) 92 %a = fcmp oeq double %y, 0x7ff0000000000000 93 %b = fcmp uno double %x, 0.0 94 %res = or i1 %a, %b 95 %xres = zext i1 %res to i32 96 ret i32 %xres 97} 98