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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
3
4define i64 @test_ashr_i64(i64 %arg1, i64 %arg2) {
5; X64-LABEL: test_ashr_i64:
6; X64:       # %bb.0:
7; X64-NEXT:    movq %rsi, %rcx
8; X64-NEXT:    # kill: def $cl killed $rcx
9; X64-NEXT:    sarq %cl, %rdi
10; X64-NEXT:    movq %rdi, %rax
11; X64-NEXT:    retq
12  %res = ashr i64 %arg1, %arg2
13  ret i64 %res
14}
15
16define i64 @test_ashr_i64_imm(i64 %arg1) {
17; X64-LABEL: test_ashr_i64_imm:
18; X64:       # %bb.0:
19; X64-NEXT:    movq $5, %rcx
20; X64-NEXT:    # kill: def $cl killed $rcx
21; X64-NEXT:    sarq %cl, %rdi
22; X64-NEXT:    movq %rdi, %rax
23; X64-NEXT:    retq
24  %res = ashr i64 %arg1, 5
25  ret i64 %res
26}
27
28define i64 @test_ashr_i64_imm1(i64 %arg1) {
29; X64-LABEL: test_ashr_i64_imm1:
30; X64:       # %bb.0:
31; X64-NEXT:    movq $1, %rcx
32; X64-NEXT:    # kill: def $cl killed $rcx
33; X64-NEXT:    sarq %cl, %rdi
34; X64-NEXT:    movq %rdi, %rax
35; X64-NEXT:    retq
36  %res = ashr i64 %arg1, 1
37  ret i64 %res
38}
39
40define i32 @test_ashr_i32(i32 %arg1, i32 %arg2) {
41; X64-LABEL: test_ashr_i32:
42; X64:       # %bb.0:
43; X64-NEXT:    movl %esi, %ecx
44; X64-NEXT:    # kill: def $cl killed $ecx
45; X64-NEXT:    sarl %cl, %edi
46; X64-NEXT:    movl %edi, %eax
47; X64-NEXT:    retq
48  %res = ashr i32 %arg1, %arg2
49  ret i32 %res
50}
51
52define i32 @test_ashr_i32_imm(i32 %arg1) {
53; X64-LABEL: test_ashr_i32_imm:
54; X64:       # %bb.0:
55; X64-NEXT:    movl $5, %ecx
56; X64-NEXT:    # kill: def $cl killed $ecx
57; X64-NEXT:    sarl %cl, %edi
58; X64-NEXT:    movl %edi, %eax
59; X64-NEXT:    retq
60  %res = ashr i32 %arg1, 5
61  ret i32 %res
62}
63
64define i32 @test_ashr_i32_imm1(i32 %arg1) {
65; X64-LABEL: test_ashr_i32_imm1:
66; X64:       # %bb.0:
67; X64-NEXT:    movl $1, %ecx
68; X64-NEXT:    # kill: def $cl killed $ecx
69; X64-NEXT:    sarl %cl, %edi
70; X64-NEXT:    movl %edi, %eax
71; X64-NEXT:    retq
72  %res = ashr i32 %arg1, 1
73  ret i32 %res
74}
75
76define i16 @test_ashr_i16(i32 %arg1, i32 %arg2) {
77; X64-LABEL: test_ashr_i16:
78; X64:       # %bb.0:
79; X64-NEXT:    movl %esi, %ecx
80; X64-NEXT:    # kill: def $cl killed $cx
81; X64-NEXT:    sarw %cl, %di
82; X64-NEXT:    movl %edi, %eax
83; X64-NEXT:    retq
84  %a = trunc i32 %arg1 to i16
85  %a2 = trunc i32 %arg2 to i16
86  %res = ashr i16 %a, %a2
87  ret i16 %res
88}
89
90define i16 @test_ashr_i16_imm(i32 %arg1) {
91; X64-LABEL: test_ashr_i16_imm:
92; X64:       # %bb.0:
93; X64-NEXT:    movw $5, %cx
94; X64-NEXT:    # kill: def $cl killed $cx
95; X64-NEXT:    sarw %cl, %di
96; X64-NEXT:    movl %edi, %eax
97; X64-NEXT:    retq
98  %a = trunc i32 %arg1 to i16
99  %res = ashr i16 %a, 5
100  ret i16 %res
101}
102
103define i16 @test_ashr_i16_imm1(i32 %arg1) {
104; X64-LABEL: test_ashr_i16_imm1:
105; X64:       # %bb.0:
106; X64-NEXT:    movw $1, %cx
107; X64-NEXT:    # kill: def $cl killed $cx
108; X64-NEXT:    sarw %cl, %di
109; X64-NEXT:    movl %edi, %eax
110; X64-NEXT:    retq
111  %a = trunc i32 %arg1 to i16
112  %res = ashr i16 %a, 1
113  ret i16 %res
114}
115
116define i8 @test_ashr_i8(i32 %arg1, i32 %arg2) {
117; X64-LABEL: test_ashr_i8:
118; X64:       # %bb.0:
119; X64-NEXT:    movl %esi, %ecx
120; X64-NEXT:    sarb %cl, %dil
121; X64-NEXT:    movl %edi, %eax
122; X64-NEXT:    retq
123  %a = trunc i32 %arg1 to i8
124  %a2 = trunc i32 %arg2 to i8
125  %res = ashr i8 %a, %a2
126  ret i8 %res
127}
128
129define i8 @test_ashr_i8_imm(i32 %arg1) {
130; X64-LABEL: test_ashr_i8_imm:
131; X64:       # %bb.0:
132; X64-NEXT:    sarb $5, %dil
133; X64-NEXT:    movl %edi, %eax
134; X64-NEXT:    retq
135  %a = trunc i32 %arg1 to i8
136  %res = ashr i8 %a, 5
137  ret i8 %res
138}
139
140define i8 @test_ashr_i8_imm1(i32 %arg1) {
141; X64-LABEL: test_ashr_i8_imm1:
142; X64:       # %bb.0:
143; X64-NEXT:    sarb %dil
144; X64-NEXT:    movl %edi, %eax
145; X64-NEXT:    retq
146  %a = trunc i32 %arg1 to i8
147  %res = ashr i8 %a, 1
148  ret i8 %res
149}
150
151define i1 @test_ashr_i1(i32 %arg1, i32 %arg2) {
152; X64-LABEL: test_ashr_i1:
153; X64:       # %bb.0:
154; X64-NEXT:    shlb $7, %dil
155; X64-NEXT:    sarb $7, %dil
156; X64-NEXT:    andb $1, %sil
157; X64-NEXT:    movl %esi, %ecx
158; X64-NEXT:    sarb %cl, %dil
159; X64-NEXT:    movl %edi, %eax
160; X64-NEXT:    retq
161  %a = trunc i32 %arg1 to i1
162  %a2 = trunc i32 %arg2 to i1
163  %res = ashr i1 %a, %a2
164  ret i1 %res
165}
166
167define i1 @test_ashr_i1_imm1(i32 %arg1) {
168; X64-LABEL: test_ashr_i1_imm1:
169; X64:       # %bb.0:
170; X64-NEXT:    movb $-1, %cl
171; X64-NEXT:    shlb $7, %dil
172; X64-NEXT:    sarb $7, %dil
173; X64-NEXT:    andb $1, %cl
174; X64-NEXT:    sarb %cl, %dil
175; X64-NEXT:    movl %edi, %eax
176; X64-NEXT:    retq
177  %a = trunc i32 %arg1 to i1
178  %res = ashr i1 %a, 1
179  ret i1 %res
180}
181