1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64 3# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32 4 5--- | 6 define void @test_memop_s8tos32() { 7 ret void 8 } 9 10 define void @test_memop_s64() { 11 ret void 12 } 13... 14--- 15name: test_memop_s8tos32 16alignment: 4 17legalized: false 18regBankSelected: false 19registers: 20 - { id: 0, class: _, preferred-register: '' } 21 - { id: 1, class: _, preferred-register: '' } 22 - { id: 2, class: _, preferred-register: '' } 23 - { id: 3, class: _, preferred-register: '' } 24 - { id: 4, class: _, preferred-register: '' } 25 - { id: 5, class: _, preferred-register: '' } 26 - { id: 6, class: _, preferred-register: '' } 27 - { id: 7, class: _, preferred-register: '' } 28 - { id: 8, class: _, preferred-register: '' } 29 - { id: 9, class: _, preferred-register: '' } 30 - { id: 10, class: _, preferred-register: '' } 31body: | 32 bb.1 (%ir-block.0): 33 liveins: $rdi 34 35 ; X64-LABEL: name: test_memop_s8tos32 36 ; X64: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF 37 ; X64: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[DEF]](p0) :: (load 1) 38 ; X64: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[DEF]](p0) :: (load 1) 39 ; X64: [[LOAD2:%[0-9]+]]:_(s16) = G_LOAD [[DEF]](p0) :: (load 2) 40 ; X64: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[DEF]](p0) :: (load 4) 41 ; X64: [[LOAD4:%[0-9]+]]:_(p0) = G_LOAD [[DEF]](p0) :: (load 8) 42 ; X64: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1 43 ; X64: [[COPY:%[0-9]+]]:_(s8) = COPY [[LOAD]](s8) 44 ; X64: [[AND:%[0-9]+]]:_(s8) = G_AND [[COPY]], [[C]] 45 ; X64: G_STORE [[AND]](s8), [[DEF]](p0) :: (store 1) 46 ; X64: G_STORE [[LOAD1]](s8), [[DEF]](p0) :: (store 1) 47 ; X64: G_STORE [[LOAD2]](s16), [[DEF]](p0) :: (store 2) 48 ; X64: G_STORE [[LOAD3]](s32), [[DEF]](p0) :: (store 4) 49 ; X64: G_STORE [[LOAD4]](p0), [[DEF]](p0) :: (store 8) 50 ; X32-LABEL: name: test_memop_s8tos32 51 ; X32: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF 52 ; X32: [[LOAD:%[0-9]+]]:_(s8) = G_LOAD [[DEF]](p0) :: (load 1) 53 ; X32: [[LOAD1:%[0-9]+]]:_(s8) = G_LOAD [[DEF]](p0) :: (load 1) 54 ; X32: [[LOAD2:%[0-9]+]]:_(s16) = G_LOAD [[DEF]](p0) :: (load 2) 55 ; X32: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[DEF]](p0) :: (load 4) 56 ; X32: [[LOAD4:%[0-9]+]]:_(p0) = G_LOAD [[DEF]](p0) :: (load 8) 57 ; X32: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1 58 ; X32: [[COPY:%[0-9]+]]:_(s8) = COPY [[LOAD]](s8) 59 ; X32: [[AND:%[0-9]+]]:_(s8) = G_AND [[COPY]], [[C]] 60 ; X32: G_STORE [[AND]](s8), [[DEF]](p0) :: (store 1) 61 ; X32: G_STORE [[LOAD1]](s8), [[DEF]](p0) :: (store 1) 62 ; X32: G_STORE [[LOAD2]](s16), [[DEF]](p0) :: (store 2) 63 ; X32: G_STORE [[LOAD3]](s32), [[DEF]](p0) :: (store 4) 64 ; X32: G_STORE [[LOAD4]](p0), [[DEF]](p0) :: (store 8) 65 %0(p0) = IMPLICIT_DEF 66 %9(s1) = G_LOAD %0(p0) :: (load 1) 67 %1(s8) = G_LOAD %0(p0) :: (load 1) 68 %2(s16) = G_LOAD %0(p0) :: (load 2) 69 %3(s32) = G_LOAD %0(p0) :: (load 4) 70 %4(p0) = G_LOAD %0(p0) :: (load 8) 71 72 G_STORE %9, %0 :: (store 1) 73 G_STORE %1, %0 :: (store 1) 74 G_STORE %2, %0 :: (store 2) 75 G_STORE %3, %0 :: (store 4) 76 G_STORE %4, %0 :: (store 8) 77... 78--- 79name: test_memop_s64 80alignment: 4 81legalized: false 82regBankSelected: false 83registers: 84 - { id: 0, class: _, preferred-register: '' } 85 - { id: 1, class: _, preferred-register: '' } 86 - { id: 2, class: _, preferred-register: '' } 87liveins: 88# 89body: | 90 bb.1 (%ir-block.0): 91 liveins: $rdi 92 93 ; X64-LABEL: name: test_memop_s64 94 ; X64: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF 95 ; X64: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[DEF]](p0) :: (load 8) 96 ; X64: G_STORE [[LOAD]](s64), [[DEF]](p0) :: (store 8) 97 ; X32-LABEL: name: test_memop_s64 98 ; X32: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF 99 ; X32: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[DEF]](p0) :: (load 4, align 8) 100 ; X32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 101 ; X32: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[DEF]], [[C]](s32) 102 ; X32: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p0) :: (load 4) 103 ; X32: G_STORE [[LOAD]](s32), [[DEF]](p0) :: (store 4, align 8) 104 ; X32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 105 ; X32: [[GEP1:%[0-9]+]]:_(p0) = G_GEP [[DEF]], [[C1]](s32) 106 ; X32: G_STORE [[LOAD1]](s32), [[GEP1]](p0) :: (store 4) 107 %0(p0) = IMPLICIT_DEF 108 %1(s64) = G_LOAD %0(p0) :: (load 8) 109 110 G_STORE %1, %0 :: (store 8) 111 112... 113