1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX 3; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx -regbankselect-greedy -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX 4 5define <4 x i32> @test_load_v4i32_noalign(<4 x i32> * %p1) { 6; SKX-LABEL: test_load_v4i32_noalign: 7; SKX: # %bb.0: 8; SKX-NEXT: vmovups (%rdi), %xmm0 9; SKX-NEXT: retq 10 %r = load <4 x i32>, <4 x i32>* %p1, align 1 11 ret <4 x i32> %r 12} 13 14define <4 x i32> @test_load_v4i32_align(<4 x i32> * %p1) { 15; SKX-LABEL: test_load_v4i32_align: 16; SKX: # %bb.0: 17; SKX-NEXT: vmovaps (%rdi), %xmm0 18; SKX-NEXT: retq 19 %r = load <4 x i32>, <4 x i32>* %p1, align 16 20 ret <4 x i32> %r 21} 22 23define <8 x i32> @test_load_v8i32_noalign(<8 x i32> * %p1) { 24; SKX-LABEL: test_load_v8i32_noalign: 25; SKX: # %bb.0: 26; SKX-NEXT: vmovups (%rdi), %ymm0 27; SKX-NEXT: retq 28 %r = load <8 x i32>, <8 x i32>* %p1, align 1 29 ret <8 x i32> %r 30} 31 32define <8 x i32> @test_load_v8i32_align(<8 x i32> * %p1) { 33; SKX-LABEL: test_load_v8i32_align: 34; SKX: # %bb.0: 35; SKX-NEXT: vmovaps (%rdi), %ymm0 36; SKX-NEXT: retq 37 %r = load <8 x i32>, <8 x i32>* %p1, align 32 38 ret <8 x i32> %r 39} 40 41define <16 x i32> @test_load_v16i32_noalign(<16 x i32> * %p1) { 42; SKX-LABEL: test_load_v16i32_noalign: 43; SKX: # %bb.0: 44; SKX-NEXT: vmovups (%rdi), %zmm0 45; SKX-NEXT: retq 46 %r = load <16 x i32>, <16 x i32>* %p1, align 1 47 ret <16 x i32> %r 48} 49 50define <16 x i32> @test_load_v16i32_align(<16 x i32> * %p1) { 51; SKX-LABEL: test_load_v16i32_align: 52; SKX: # %bb.0: 53; SKX-NEXT: vmovups (%rdi), %zmm0 54; SKX-NEXT: retq 55 %r = load <16 x i32>, <16 x i32>* %p1, align 32 56 ret <16 x i32> %r 57} 58 59define void @test_store_v4i32_noalign(<4 x i32> %val, <4 x i32>* %p1) { 60; SKX-LABEL: test_store_v4i32_noalign: 61; SKX: # %bb.0: 62; SKX-NEXT: vmovups %xmm0, (%rdi) 63; SKX-NEXT: retq 64 store <4 x i32> %val, <4 x i32>* %p1, align 1 65 ret void 66} 67 68define void @test_store_v4i32_align(<4 x i32> %val, <4 x i32>* %p1) { 69; SKX-LABEL: test_store_v4i32_align: 70; SKX: # %bb.0: 71; SKX-NEXT: vmovaps %xmm0, (%rdi) 72; SKX-NEXT: retq 73 store <4 x i32> %val, <4 x i32>* %p1, align 16 74 ret void 75} 76 77define void @test_store_v8i32_noalign(<8 x i32> %val, <8 x i32>* %p1) { 78; SKX-LABEL: test_store_v8i32_noalign: 79; SKX: # %bb.0: 80; SKX-NEXT: vmovups %ymm0, (%rdi) 81; SKX-NEXT: vzeroupper 82; SKX-NEXT: retq 83 store <8 x i32> %val, <8 x i32>* %p1, align 1 84 ret void 85} 86 87define void @test_store_v8i32_align(<8 x i32> %val, <8 x i32>* %p1) { 88; SKX-LABEL: test_store_v8i32_align: 89; SKX: # %bb.0: 90; SKX-NEXT: vmovaps %ymm0, (%rdi) 91; SKX-NEXT: vzeroupper 92; SKX-NEXT: retq 93 store <8 x i32> %val, <8 x i32>* %p1, align 32 94 ret void 95} 96 97define void @test_store_v16i32_noalign(<16 x i32> %val, <16 x i32>* %p1) { 98; SKX-LABEL: test_store_v16i32_noalign: 99; SKX: # %bb.0: 100; SKX-NEXT: vmovups %zmm0, (%rdi) 101; SKX-NEXT: vzeroupper 102; SKX-NEXT: retq 103 store <16 x i32> %val, <16 x i32>* %p1, align 1 104 ret void 105} 106 107define void @test_store_v16i32_align(<16 x i32> %val, <16 x i32>* %p1) { 108; SKX-LABEL: test_store_v16i32_align: 109; SKX: # %bb.0: 110; SKX-NEXT: vmovaps %zmm0, (%rdi) 111; SKX-NEXT: vzeroupper 112; SKX-NEXT: retq 113 store <16 x i32> %val, <16 x i32>* %p1, align 64 114 ret void 115} 116 117