1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X32 3--- | 4 define i64 @test_add_i64(i64 %a, i64 %b) { 5 %r = add i64 %a, %b 6 ret i64 %r 7 } 8 9... 10--- 11name: test_add_i64 12alignment: 4 13legalized: true 14regBankSelected: true 15registers: 16 - { id: 0, class: gpr } 17 - { id: 1, class: gpr } 18 - { id: 2, class: gpr } 19 - { id: 3, class: gpr } 20 - { id: 4, class: gpr } 21 - { id: 5, class: gpr } 22 - { id: 6, class: gpr } 23 - { id: 7, class: gpr } 24 - { id: 8, class: gpr } 25 - { id: 9, class: gpr } 26body: | 27 bb.0 (%ir-block.0): 28 ; X32-LABEL: name: test_add_i64 29 ; X32: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF 30 ; X32: [[DEF1:%[0-9]+]]:gr32 = IMPLICIT_DEF 31 ; X32: [[DEF2:%[0-9]+]]:gr32 = IMPLICIT_DEF 32 ; X32: [[DEF3:%[0-9]+]]:gr32 = IMPLICIT_DEF 33 ; X32: [[ADD32rr:%[0-9]+]]:gr32 = ADD32rr [[DEF]], [[DEF2]], implicit-def $eflags 34 ; X32: [[COPY:%[0-9]+]]:gr32 = COPY $eflags 35 ; X32: $eflags = COPY [[COPY]] 36 ; X32: [[ADC32rr:%[0-9]+]]:gr32 = ADC32rr [[DEF1]], [[DEF3]], implicit-def $eflags, implicit $eflags 37 ; X32: [[COPY1:%[0-9]+]]:gr32 = COPY $eflags 38 ; X32: $eax = COPY [[ADD32rr]] 39 ; X32: $edx = COPY [[ADC32rr]] 40 ; X32: RET 0, implicit $eax, implicit $edx 41 %0(s32) = IMPLICIT_DEF 42 %1(s32) = IMPLICIT_DEF 43 %2(s32) = IMPLICIT_DEF 44 %3(s32) = IMPLICIT_DEF 45 %9(s8) = G_CONSTANT i8 0 46 %4(s1) = G_TRUNC %9(s8) 47 %5(s32), %6(s1) = G_UADDE %0, %2, %4 48 %7(s32), %8(s1) = G_UADDE %1, %3, %6 49 $eax = COPY %5(s32) 50 $edx = COPY %7(s32) 51 RET 0, implicit $eax, implicit $edx 52 53... 54