1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL 3 4--- | 5 define i8 @test_and_i8(i8 %arg1, i8 %arg2) { 6 %ret = and i8 %arg1, %arg2 7 ret i8 %ret 8 } 9 10 define i16 @test_and_i16(i16 %arg1, i16 %arg2) { 11 %ret = and i16 %arg1, %arg2 12 ret i16 %ret 13 } 14 15 define i32 @test_and_i32(i32 %arg1, i32 %arg2) { 16 %ret = and i32 %arg1, %arg2 17 ret i32 %ret 18 } 19 20 define i64 @test_and_i64(i64 %arg1, i64 %arg2) { 21 %ret = and i64 %arg1, %arg2 22 ret i64 %ret 23 } 24 25... 26--- 27name: test_and_i8 28alignment: 4 29legalized: true 30regBankSelected: true 31registers: 32 - { id: 0, class: gpr, preferred-register: '' } 33 - { id: 1, class: gpr, preferred-register: '' } 34 - { id: 2, class: gpr, preferred-register: '' } 35liveins: 36fixedStack: 37stack: 38constants: 39body: | 40 bb.1 (%ir-block.0): 41 liveins: $edi, $esi 42 43 ; ALL-LABEL: name: test_and_i8 44 ; ALL: [[COPY:%[0-9]+]]:gr8 = COPY $dil 45 ; ALL: [[COPY1:%[0-9]+]]:gr8 = COPY $sil 46 ; ALL: [[AND8rr:%[0-9]+]]:gr8 = AND8rr [[COPY]], [[COPY1]], implicit-def $eflags 47 ; ALL: $al = COPY [[AND8rr]] 48 ; ALL: RET 0, implicit $al 49 %0(s8) = COPY $dil 50 %1(s8) = COPY $sil 51 %2(s8) = G_AND %0, %1 52 $al = COPY %2(s8) 53 RET 0, implicit $al 54 55... 56--- 57name: test_and_i16 58alignment: 4 59legalized: true 60regBankSelected: true 61registers: 62 - { id: 0, class: gpr, preferred-register: '' } 63 - { id: 1, class: gpr, preferred-register: '' } 64 - { id: 2, class: gpr, preferred-register: '' } 65liveins: 66fixedStack: 67stack: 68constants: 69body: | 70 bb.1 (%ir-block.0): 71 liveins: $edi, $esi 72 73 ; ALL-LABEL: name: test_and_i16 74 ; ALL: [[COPY:%[0-9]+]]:gr16 = COPY $di 75 ; ALL: [[COPY1:%[0-9]+]]:gr16 = COPY $si 76 ; ALL: [[AND16rr:%[0-9]+]]:gr16 = AND16rr [[COPY]], [[COPY1]], implicit-def $eflags 77 ; ALL: $ax = COPY [[AND16rr]] 78 ; ALL: RET 0, implicit $ax 79 %0(s16) = COPY $di 80 %1(s16) = COPY $si 81 %2(s16) = G_AND %0, %1 82 $ax = COPY %2(s16) 83 RET 0, implicit $ax 84 85... 86--- 87name: test_and_i32 88alignment: 4 89legalized: true 90regBankSelected: true 91registers: 92 - { id: 0, class: gpr, preferred-register: '' } 93 - { id: 1, class: gpr, preferred-register: '' } 94 - { id: 2, class: gpr, preferred-register: '' } 95liveins: 96fixedStack: 97stack: 98constants: 99body: | 100 bb.1 (%ir-block.0): 101 liveins: $edi, $esi 102 103 ; ALL-LABEL: name: test_and_i32 104 ; ALL: [[COPY:%[0-9]+]]:gr32 = COPY $edi 105 ; ALL: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 106 ; ALL: [[AND32rr:%[0-9]+]]:gr32 = AND32rr [[COPY]], [[COPY1]], implicit-def $eflags 107 ; ALL: $eax = COPY [[AND32rr]] 108 ; ALL: RET 0, implicit $eax 109 %0(s32) = COPY $edi 110 %1(s32) = COPY $esi 111 %2(s32) = G_AND %0, %1 112 $eax = COPY %2(s32) 113 RET 0, implicit $eax 114 115... 116--- 117name: test_and_i64 118alignment: 4 119legalized: true 120regBankSelected: true 121registers: 122 - { id: 0, class: gpr, preferred-register: '' } 123 - { id: 1, class: gpr, preferred-register: '' } 124 - { id: 2, class: gpr, preferred-register: '' } 125liveins: 126fixedStack: 127stack: 128constants: 129body: | 130 bb.1 (%ir-block.0): 131 liveins: $rdi, $rsi 132 133 ; ALL-LABEL: name: test_and_i64 134 ; ALL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 135 ; ALL: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 136 ; ALL: [[AND64rr:%[0-9]+]]:gr64 = AND64rr [[COPY]], [[COPY1]], implicit-def $eflags 137 ; ALL: $rax = COPY [[AND64rr]] 138 ; ALL: RET 0, implicit $rax 139 %0(s64) = COPY $rdi 140 %1(s64) = COPY $rsi 141 %2(s64) = G_AND %0, %1 142 $rax = COPY %2(s64) 143 RET 0, implicit $rax 144 145... 146