1# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL 2 3# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL 4 5--- | 6 define void @test_extract_128_idx0() { 7 ret void 8 } 9 10 define void @test_extract_128_idx1() { 11 ret void 12 } 13 14 define void @test_extract_256_idx0() { 15 ret void 16 } 17 18 define void @test_extract_256_idx1() { 19 ret void 20 } 21 22... 23--- 24name: test_extract_128_idx0 25# ALL-LABEL: name: test_extract_128_idx0 26alignment: 4 27legalized: true 28regBankSelected: true 29# ALL: registers: 30# ALL-NEXT: - { id: 0, class: vr512, preferred-register: '' } 31# ALL-NEXT: - { id: 1, class: vr128x, preferred-register: '' } 32registers: 33 - { id: 0, class: vecr } 34 - { id: 1, class: vecr } 35# ALL: %0:vr512 = COPY $zmm1 36# ALL-NEXT: %1:vr128x = COPY %0.sub_xmm 37# ALL-NEXT: $xmm0 = COPY %1 38# ALL-NEXT: RET 0, implicit $xmm0 39body: | 40 bb.1 (%ir-block.0): 41 liveins: $zmm1 42 43 %0(<16 x s32>) = COPY $zmm1 44 %1(<4 x s32>) = G_EXTRACT %0(<16 x s32>), 0 45 $xmm0 = COPY %1(<4 x s32>) 46 RET 0, implicit $xmm0 47 48... 49--- 50name: test_extract_128_idx1 51# ALL-LABEL: name: test_extract_128_idx1 52alignment: 4 53legalized: true 54regBankSelected: true 55# ALL: registers: 56# ALL-NEXT: - { id: 0, class: vr512, preferred-register: '' } 57# ALL-NEXT: - { id: 1, class: vr128x, preferred-register: '' } 58registers: 59 - { id: 0, class: vecr } 60 - { id: 1, class: vecr } 61# ALL: %0:vr512 = COPY $zmm1 62# ALL-NEXT: %1:vr128x = VEXTRACTF32x4Zrr %0, 1 63# ALL-NEXT: $xmm0 = COPY %1 64# ALL-NEXT: RET 0, implicit $xmm0 65body: | 66 bb.1 (%ir-block.0): 67 liveins: $zmm1 68 69 %0(<16 x s32>) = COPY $zmm1 70 %1(<4 x s32>) = G_EXTRACT %0(<16 x s32>), 128 71 $xmm0 = COPY %1(<4 x s32>) 72 RET 0, implicit $xmm0 73 74... 75--- 76name: test_extract_256_idx0 77# ALL-LABEL: name: test_extract_256_idx0 78alignment: 4 79legalized: true 80regBankSelected: true 81# ALL: registers: 82# ALL-NEXT: - { id: 0, class: vr512, preferred-register: '' } 83# ALL-NEXT: - { id: 1, class: vr256x, preferred-register: '' } 84registers: 85 - { id: 0, class: vecr } 86 - { id: 1, class: vecr } 87# ALL: %0:vr512 = COPY $zmm1 88# ALL-NEXT: %1:vr256x = COPY %0.sub_ymm 89# ALL-NEXT: $ymm0 = COPY %1 90# ALL-NEXT: RET 0, implicit $ymm0 91body: | 92 bb.1 (%ir-block.0): 93 liveins: $zmm1 94 95 %0(<16 x s32>) = COPY $zmm1 96 %1(<8 x s32>) = G_EXTRACT %0(<16 x s32>), 0 97 $ymm0 = COPY %1(<8 x s32>) 98 RET 0, implicit $ymm0 99 100... 101--- 102name: test_extract_256_idx1 103# ALL-LABEL: name: test_extract_256_idx1 104alignment: 4 105legalized: true 106regBankSelected: true 107# ALL: registers: 108# ALL-NEXT: - { id: 0, class: vr512, preferred-register: '' } 109# ALL-NEXT: - { id: 1, class: vr256x, preferred-register: '' } 110registers: 111 - { id: 0, class: vecr } 112 - { id: 1, class: vecr } 113# ALL: %0:vr512 = COPY $zmm1 114# ALL-NEXT: %1:vr256x = VEXTRACTF64x4Zrr %0, 1 115# ALL-NEXT: $ymm0 = COPY %1 116# ALL-NEXT: RET 0, implicit $ymm0 117body: | 118 bb.1 (%ir-block.0): 119 liveins: $zmm1 120 121 %0(<16 x s32>) = COPY $zmm1 122 %1(<8 x s32>) = G_EXTRACT %0(<16 x s32>), 256 123 $ymm0 = COPY %1(<8 x s32>) 124 RET 0, implicit $ymm0 125 126... 127