1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3 4--- | 5 ; ModuleID = 'sdiv.ll' 6 source_filename = "sdiv.ll" 7 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 8 9 define i8 @test_sdiv_i8(i8 %arg1, i8 %arg2) { 10 %res = sdiv i8 %arg1, %arg2 11 ret i8 %res 12 } 13 14 define i16 @test_sdiv_i16(i16 %arg1, i16 %arg2) { 15 %res = sdiv i16 %arg1, %arg2 16 ret i16 %res 17 } 18 19 define i32 @test_sdiv_i32(i32 %arg1, i32 %arg2) { 20 %res = sdiv i32 %arg1, %arg2 21 ret i32 %res 22 } 23 24... 25--- 26name: test_sdiv_i8 27alignment: 4 28legalized: true 29regBankSelected: true 30tracksRegLiveness: true 31registers: 32 - { id: 0, class: gpr } 33 - { id: 1, class: gpr } 34 - { id: 2, class: gpr } 35 - { id: 3, class: gpr } 36 - { id: 4, class: gpr } 37body: | 38 bb.1 (%ir-block.0): 39 liveins: $edi, $esi 40 41 ; CHECK-LABEL: name: test_sdiv_i8 42 ; CHECK: liveins: $edi, $esi 43 ; CHECK: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi 44 ; CHECK: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 45 ; CHECK: [[COPY2:%[0-9]+]]:gr32_abcd = COPY $esi 46 ; CHECK: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY2]].sub_8bit 47 ; CHECK: $ax = MOVSX16rr8 [[COPY1]] 48 ; CHECK: IDIV8r [[COPY3]], implicit-def $al, implicit-def $ah, implicit-def $eflags, implicit $ax 49 ; CHECK: [[COPY4:%[0-9]+]]:gr8 = COPY $al 50 ; CHECK: $al = COPY [[COPY4]] 51 ; CHECK: RET 0, implicit $al 52 %2:gpr(s32) = COPY $edi 53 %0:gpr(s8) = G_TRUNC %2(s32) 54 %3:gpr(s32) = COPY $esi 55 %1:gpr(s8) = G_TRUNC %3(s32) 56 %4:gpr(s8) = G_SDIV %0, %1 57 $al = COPY %4(s8) 58 RET 0, implicit $al 59 60... 61--- 62name: test_sdiv_i16 63alignment: 4 64legalized: true 65regBankSelected: true 66tracksRegLiveness: true 67registers: 68 - { id: 0, class: gpr } 69 - { id: 1, class: gpr } 70 - { id: 2, class: gpr } 71 - { id: 3, class: gpr } 72 - { id: 4, class: gpr } 73body: | 74 bb.1 (%ir-block.0): 75 liveins: $edi, $esi 76 77 ; CHECK-LABEL: name: test_sdiv_i16 78 ; CHECK: liveins: $edi, $esi 79 ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi 80 ; CHECK: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 81 ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $esi 82 ; CHECK: [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit 83 ; CHECK: $ax = COPY [[COPY1]] 84 ; CHECK: CWD implicit-def $ax, implicit-def $dx, implicit $ax 85 ; CHECK: IDIV16r [[COPY3]], implicit-def $ax, implicit-def $dx, implicit-def $eflags, implicit $ax, implicit $dx 86 ; CHECK: [[COPY4:%[0-9]+]]:gr16 = COPY $ax 87 ; CHECK: $ax = COPY [[COPY4]] 88 ; CHECK: RET 0, implicit $ax 89 %2:gpr(s32) = COPY $edi 90 %0:gpr(s16) = G_TRUNC %2(s32) 91 %3:gpr(s32) = COPY $esi 92 %1:gpr(s16) = G_TRUNC %3(s32) 93 %4:gpr(s16) = G_SDIV %0, %1 94 $ax = COPY %4(s16) 95 RET 0, implicit $ax 96 97... 98--- 99name: test_sdiv_i32 100alignment: 4 101legalized: true 102regBankSelected: true 103tracksRegLiveness: true 104registers: 105 - { id: 0, class: gpr } 106 - { id: 1, class: gpr } 107 - { id: 2, class: gpr } 108body: | 109 bb.1 (%ir-block.0): 110 liveins: $edi, $esi 111 112 ; CHECK-LABEL: name: test_sdiv_i32 113 ; CHECK: liveins: $edi, $esi 114 ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi 115 ; CHECK: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 116 ; CHECK: $eax = COPY [[COPY]] 117 ; CHECK: CDQ implicit-def $eax, implicit-def $edx, implicit $eax 118 ; CHECK: IDIV32r [[COPY1]], implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx 119 ; CHECK: [[COPY2:%[0-9]+]]:gr32 = COPY $eax 120 ; CHECK: $eax = COPY [[COPY2]] 121 ; CHECK: RET 0, implicit $eax 122 %0:gpr(s32) = COPY $edi 123 %1:gpr(s32) = COPY $esi 124 %2:gpr(s32) = G_SDIV %0, %1 125 $eax = COPY %2(s32) 126 RET 0, implicit $eax 127 128... 129