1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=KNL 3; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=SKX 4 5define double @test1(double %a, double %b) nounwind { 6; ALL-LABEL: test1: 7; ALL: ## %bb.0: 8; ALL-NEXT: vucomisd %xmm1, %xmm0 9; ALL-NEXT: jne LBB0_1 10; ALL-NEXT: jnp LBB0_2 11; ALL-NEXT: LBB0_1: ## %l1 12; ALL-NEXT: vsubsd %xmm1, %xmm0, %xmm0 13; ALL-NEXT: retq 14; ALL-NEXT: LBB0_2: ## %l2 15; ALL-NEXT: vaddsd %xmm1, %xmm0, %xmm0 16; ALL-NEXT: retq 17 %tobool = fcmp une double %a, %b 18 br i1 %tobool, label %l1, label %l2 19 20l1: 21 %c = fsub double %a, %b 22 ret double %c 23l2: 24 %c1 = fadd double %a, %b 25 ret double %c1 26} 27 28define float @test2(float %a, float %b) nounwind { 29; ALL-LABEL: test2: 30; ALL: ## %bb.0: 31; ALL-NEXT: vucomiss %xmm0, %xmm1 32; ALL-NEXT: jbe LBB1_2 33; ALL-NEXT: ## %bb.1: ## %l1 34; ALL-NEXT: vsubss %xmm1, %xmm0, %xmm0 35; ALL-NEXT: retq 36; ALL-NEXT: LBB1_2: ## %l2 37; ALL-NEXT: vaddss %xmm1, %xmm0, %xmm0 38; ALL-NEXT: retq 39 %tobool = fcmp olt float %a, %b 40 br i1 %tobool, label %l1, label %l2 41 42l1: 43 %c = fsub float %a, %b 44 ret float %c 45l2: 46 %c1 = fadd float %a, %b 47 ret float %c1 48} 49 50define i32 @test3(float %a, float %b) { 51; ALL-LABEL: test3: 52; ALL: ## %bb.0: 53; ALL-NEXT: vcmpeqss %xmm1, %xmm0, %k0 54; ALL-NEXT: kmovw %k0, %eax 55; ALL-NEXT: retq 56 57 %cmp10.i = fcmp oeq float %a, %b 58 %conv11.i = zext i1 %cmp10.i to i32 59 ret i32 %conv11.i 60} 61 62define float @test5(float %p) #0 { 63; ALL-LABEL: test5: 64; ALL: ## %bb.0: ## %entry 65; ALL-NEXT: vxorps %xmm1, %xmm1, %xmm1 66; ALL-NEXT: vucomiss %xmm1, %xmm0 67; ALL-NEXT: jne LBB3_1 68; ALL-NEXT: jp LBB3_1 69; ALL-NEXT: ## %bb.2: ## %return 70; ALL-NEXT: retq 71; ALL-NEXT: LBB3_1: ## %if.end 72; ALL-NEXT: seta %al 73; ALL-NEXT: movzbl %al, %eax 74; ALL-NEXT: leaq {{.*}}(%rip), %rcx 75; ALL-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 76; ALL-NEXT: retq 77entry: 78 %cmp = fcmp oeq float %p, 0.000000e+00 79 br i1 %cmp, label %return, label %if.end 80 81if.end: ; preds = %entry 82 %cmp1 = fcmp ogt float %p, 0.000000e+00 83 %cond = select i1 %cmp1, float 1.000000e+00, float -1.000000e+00 84 br label %return 85 86return: ; preds = %if.end, %entry 87 %retval.0 = phi float [ %cond, %if.end ], [ %p, %entry ] 88 ret float %retval.0 89} 90 91define i32 @test6(i32 %a, i32 %b) { 92; ALL-LABEL: test6: 93; ALL: ## %bb.0: 94; ALL-NEXT: xorl %eax, %eax 95; ALL-NEXT: cmpl %esi, %edi 96; ALL-NEXT: sete %al 97; ALL-NEXT: retq 98 %cmp = icmp eq i32 %a, %b 99 %res = zext i1 %cmp to i32 100 ret i32 %res 101} 102 103define i32 @test7(double %x, double %y) #2 { 104; ALL-LABEL: test7: 105; ALL: ## %bb.0: ## %entry 106; ALL-NEXT: xorl %eax, %eax 107; ALL-NEXT: vucomisd %xmm1, %xmm0 108; ALL-NEXT: setne %al 109; ALL-NEXT: retq 110entry: 111 %0 = fcmp one double %x, %y 112 %or = zext i1 %0 to i32 113 ret i32 %or 114} 115 116define i32 @test8(i32 %a1, i32 %a2, i32 %a3) { 117; ALL-LABEL: test8: 118; ALL: ## %bb.0: 119; ALL-NEXT: notl %edi 120; ALL-NEXT: xorl $-2147483648, %esi ## imm = 0x80000000 121; ALL-NEXT: testl %edx, %edx 122; ALL-NEXT: movl $1, %eax 123; ALL-NEXT: cmovel %eax, %edx 124; ALL-NEXT: orl %edi, %esi 125; ALL-NEXT: cmovnel %edx, %eax 126; ALL-NEXT: retq 127 %tmp1 = icmp eq i32 %a1, -1 128 %tmp2 = icmp eq i32 %a2, -2147483648 129 %tmp3 = and i1 %tmp1, %tmp2 130 %tmp4 = icmp eq i32 %a3, 0 131 %tmp5 = or i1 %tmp3, %tmp4 132 %res = select i1 %tmp5, i32 1, i32 %a3 133 ret i32 %res 134} 135 136define i32 @test9(i64 %a) { 137; ALL-LABEL: test9: 138; ALL: ## %bb.0: 139; ALL-NEXT: testb $1, %dil 140; ALL-NEXT: jne LBB7_2 141; ALL-NEXT: ## %bb.1: ## %A 142; ALL-NEXT: movl $6, %eax 143; ALL-NEXT: retq 144; ALL-NEXT: LBB7_2: ## %B 145; ALL-NEXT: movl $7, %eax 146; ALL-NEXT: retq 147 %b = and i64 %a, 1 148 %cmp10.i = icmp eq i64 %b, 0 149 br i1 %cmp10.i, label %A, label %B 150A: 151 ret i32 6 152B: 153 ret i32 7 154} 155 156define i32 @test10(i64 %b, i64 %c, i1 %d) { 157; ALL-LABEL: test10: 158; ALL: ## %bb.0: 159; ALL-NEXT: movl %edx, %eax 160; ALL-NEXT: andb $1, %al 161; ALL-NEXT: cmpq %rsi, %rdi 162; ALL-NEXT: sete %cl 163; ALL-NEXT: orb %dl, %cl 164; ALL-NEXT: andb $1, %cl 165; ALL-NEXT: cmpb %cl, %al 166; ALL-NEXT: je LBB8_1 167; ALL-NEXT: ## %bb.2: ## %if.end.i 168; ALL-NEXT: movl $6, %eax 169; ALL-NEXT: retq 170; ALL-NEXT: LBB8_1: ## %if.then.i 171; ALL-NEXT: movl $5, %eax 172; ALL-NEXT: retq 173 174 %cmp8.i = icmp eq i64 %b, %c 175 %or1 = or i1 %d, %cmp8.i 176 %xor1 = xor i1 %d, %or1 177 br i1 %xor1, label %if.end.i, label %if.then.i 178 179if.then.i: 180 ret i32 5 181 182if.end.i: 183 ret i32 6 184} 185